Texas Instruments Corporation

Peter W Cheng

Mohammad Yunus

Sofjan Goenawan

A method and system for providing a filter having an increased speed and decreased settling time are disclosed. The method and system comprise summing means for adding and subtracting. The method and system further comprise means coupled to the summer for providing a delay; and a clock coupled to the delay providing means. The clock determines a number of samples during a predetermined time. The clock is operated at a plurality of frequencies such that the total number of samples during the predetermined time is a predetermined number. According to the method and system disclosed, the filter has an increased speed. The increased speed of the filter can operate to extend the lifetime of power devices.

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Fremont, CA, United States of America

Peter W Cheng