Arm Limited

Peter Raphael Eid

Luca Maroncelli

Cedric Denis Robert Airaud

Florent Begon

A data processing apparatus is provided. Prefetch circuitry generates a prefetch request for a cache line prior to the cache line being explicitly requested. The cache line is predicted to be required for a store operation in the future. Issuing circuitry issues the prefetch request to a memory hierarchy and filter circuitry filters the prefetch request based on at least one other prefetch request made to the cache line, to control whether the prefetch request is issued by the issuing circuitry.

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Cambridge, United Kingdom

Peter Raphael Eid