Lsi Logic Corporation

Peter R Baran

Roderick James McInnis

George Apostol, Jr

A unified memory system includes a processor, a memory controller, a plurality of bus transactor circuits and a shared memory port. A processor bus is coupled between the processor and the memory controller. A first multiple-bit, bidirectional system bus is coupled between the shared memory port, the memory controller and the plurality of bus transactor circuits. A second multiple-bit, bidirectional system bus is coupled between the memory controller and the plurality of bus transactor circuits.

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Fremont, CA, United States of America

Peter R Baran