Other

Avago Technologies Fiber IP (singapore) Pte. Ltd

Agilent Technologies, Inc.

Avago Technologies General IP (singapore) Pte. Ltd.

Xcerra Corporation

Peter Pei-Tak Ho

Michael Allen Robinson

Richard Clayton Walker

Zuowei Shen

Graham Flower

David P McConnell

Benny W H Lai

Benjamin Brown

Niraj Rangwala

Howard Maassen

Vishant Tyagi

A method, computer program product, computing system, and an automated test platform for testing at least one device under test includes a test head configured to receive the at least one device under test. A processing system is configured to: provide a voltage signal having a plurality of voltages to the at least one device under test, monitor a current flow into the at least one device under test during each of the plurality of voltages, thus generating a plurality of monitored current values that correspond to the plurality of voltages, and determine if one or more of the plurality of monitored current values exceeds one or more of a plurality of current thresholds.

Testing system and method

A TIA circuit and method are provided that merge the automatic gain control function with the bandwidth adjustment function to allow the TIA circuit to operate over a wide dynamic range at multiple data rates. The TIA circuit has an effective resistance that is adjustable for adjusting the gain and the bandwidth of the TIA circuit. The mechanism of the TIA circuit that is used to adjust the effective resistance, and hence the gain and bandwidth of the TIA circuit, is temperature independent, and as such, the performance of the TIA circuit is not affected by temperature variations.

Transimpedance amplifier (TIA) circuit and method

A clock-data recovery circuit includes a phase rotator, a phase detector and a charge pump. The phase rotator receives first and second reference clocks and differential control signals. The phase rotator generates a modified clock signal responsive to the first and second reference clocks and the control signals. The phase detector receives a data signal and the modified clock signal. The phase detector generates a modified data signal and a phase error signal responsive to the data signal and the modified clock signal. The charge pump receives the phase error signal and generates the differential control signals, which direct the phase rotator to interpolate between select clock phases.

Circuits and methods for clock and data recovery

Wirebonds are formed to couple an opto-electronic device chip having two or more opto-electronic devices to a signal processing chip. Two or more mutually adjacent wirebond groups, each corresponding to one of the opto-electronic devices, are formed. For example, each wirebond group can include a first wirebond coupling a P-terminal of the opto-electronic device of the wirebond group to the signal processing chip, a second wirebond coupling an N-terminal of the opto-electronic device of the wirebond group to the signal processing chip, and a third wirebond coupling the opto-electronic device chip to the signal processing chip.

Reduced-crosstalk wirebonding in an optical communication system

Equalization for ports of a crosspoint switch at least partially offsets transmission losses such as skin loss. The equalization may be tailored on a port-by-port basis using adaptive equalization or adjustable equalization, but fixed equalization may be used. In some implementations, each input port or output port of a crosspoint switch has a dedicated equalization circuit that has filtering characteristics that are based on the signal characteristics (e.g., jitter) measured at the affected output port. For an adjustable equalization approach, the adjustable equalization circuitry includes various switched connections that are selectively coupled and decoupled to achieve the target level of equalization.

Equalization for crosspoint switches

A multiplexer for use with switching apparatus for data communication networks. The multiplexer topology includes two or more groupings, or sections, each containing a plurality of individual channels. Each of the channels has an input buffer amplifier and an output Ft-doubler circuit. The outputs of all of the channels within a each particular channel section are connected in parallel relation, and fed to respective common-base transistor amplifiers. The outputs of all of the common-base amplifiers for each channel section, in turn, are connected in parallel and fed to the inputs of a pair of emitter-follower amplifiers. Through the use of selectively actuated current sources, each multiplexer channel is normally biased off, unless that channel is selected for a switching operation. Bleeder current sources are applied to the emitters of the common-base amplifiers to reduce output jitter from the channels which are biased off. The multiplexer architecture provides high speed operation from channel sectioning, and low power consumption by reducing both the amount of current drawn and the voltage potential necessary, to operate the multiplexer.

Multiplexer with channel sectioning, selectivity actuated current sources, and common-base amplifiers

A thin, flat hangtag for holding notepaper and of the type having an aperture to hang onto a projection, a pair of longitudinal slits to hold a writing instrument, and at least one die-cut flap which hinges on a fold-line to open outward to support the bottom of a notepaper pad. The hangtag may contain a die-cut slit or a die-cut tongue at a predetermined space above the flap to partially accommodate the last note sheet in order to further secure the notepaper pad. In addition, the hangtag may contain one or a plurality of slits communicating outwardly from the aperture for easy mounting on a projection. Furthermore, the hangtag may contain lateral scored fold-lines across the top, the mid-section, and the bottom of the writing instrument holding slits to facilitate the ease of insertion of writing instrument.

Growing community of inventors

Chicago, IL, United States of America

Peter Pei-Tak Ho