Kemet Electronics Corporation

Peter Par Blais

John D Prymak

Yanming Liu

Chris Stolarski

Brandon Summey

Chris Wayne

George Haddox

Michael Prevallet

Jim Piller

Michael Randall

Garry L Renner

Azizuddin Tajuddin

Allen Hill

Randal J Vaughan

An improved array of capacitors is provided wherein the improvement includes improved electrical properties and improved packing density. The array has an anode foil and a dielectric on a surface of the anode foil. A multiplicity of areas are defined on the dielectric wherein each area is circumvented by an isolation material and the isolation material extends through the dielectric. A conductive cathode layer in each area forms a capacitive couple. At least one substrate vacancy is in the anode foil and the substrate vacancy electrically isolates adjacent anodes of adjacent capacitive couples. A carrier film is attached to the capacitive couples.

Method of manufacturing a capacitor array

Capacitor array and method of manufacture

A capacitor assembly with a substrate having a first face and a second face. A multiplicity of capacitors are mounted on the first face wherein each capacitor has a first lead and a second lead of opposite polarity to the first lead. A bridge is in electrical contact with multiple first leads. A tree is in electrical contact with the bridge wherein the tree passes through a via of the substrate and is in electrical contact with a first trace of the second face. A second trace is on the second face wherein the second lead is in electrical contact with the second trace.

Concentrated capacitor assembly

A low inductance multi-layer capacitor. The capacitor comprises interleaved parallel internal electrode plates with dielectric there between. Each internal electrode plate comprises two lead-out tabs and is generally T shaped. A first external electrode terminal is electrically connected to the lead-out tabs of the even internal electrode plates, and a second external electrode terminal is electrically connected to the lead-out tabs of the odd internal electrode plates. The external electrode terminals are on a common first exterior surface and a common opposing second exterior surface of the capacitor.

Low inductance high ESR capacitor

Growing community of inventors

Milford, MA, United States of America

Peter Par Blais