Seagate Technology Incorporated

Cirrus Logic Inc.

Peter Murray

Neal Glover

Robert Dale Murphy

A digital phase detector that conducts pump up and pump down control signals to a charge pump, wherein each of the control signals has pulses that have a substantially 50/50 duty cycle characteristic when the two input signals, i.e., the input data signal and the feedback clock signal, are substantially in phase. This substantially 50/50 duty cycle output reduces, if not eliminates, inherent problems related to the turn-on delays of the charge pump while maintaining a locked condition. The phase detector may further include an intelligence to detect and handle other situations, such as missing data pulses.

Phase frequency detector circuit having reduced dead band

A Loss of Lock Detector and Re-lock Control function using digital techniques to detect a programmable difference in frequencies over a programmable range. Once Loss of Lock is detected, the Re-lock sequence is initiated and PLLIS, PLLMS & PLLGS are stepped through a programmable sequence. The invention detects the frequency difference by counting down two counters and evaluating the value left in one when the other reaches terminal count using a programmable tolerance of frequency differences before Loss of Lock is declared. The complexity and cost of implementation of the invention is reduced by multiple use of a single down counter. Other features of the invention are disclosed.

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Louisville, CO, United States of America

Peter Murray