Siemens Aktiengesellschaft

Peter Muhmenthaler

Dominique Savignac

Hans-Dieter Oberle

Hans D Oberle

Martin Peisl

A semiconductor memory is subdivided into a plurality of function units and has m leads addressable from outside, internal signal lines leading from the function units to the leads, internal signal lines connecting the function units with one another, and a test unit recognizing a test mode from a code word applied to k leads, where k.ltoreq.m. A device switches over from a memory mode to the test mode. The test unit decouples at least one of the signal lines leading to the leads from an associated lead of the semiconductor memory and connects the lead to an internal signal line connecting the function units.

Integrated semiconductor memory device capable of switching from a

An integrated semiconductor memory includes a parallel test device and block groups. The parallel test device is used for writing in and evaluating data to be written into and read out of the semiconductor memory. Several groups of memory cells can be simultaneously tested for operation in a test mode, with each group being disposed along a respective word line. The data read out during the process can be evaluated by the parallel test device. The result of the evaluation is present, separately for each group of memory cells, on I/O data lines of the semiconductor memory. The semiconductor memory can also have redundant memory cells, in which case defective memory cells or groups of memory cells can be replaced in connection with the test mode.

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Munich, Germany

Peter Muhmenthaler