Selex Es Gmbh

Leonardo Mw Ltd.

Selex Galileo Limited

Leonardo UK Limited

Peter Michael Thorne

Peter Knowles

Mark Clifford Wilson

Chris Chalk

An Infra Red detector system and method is disclosed that implements a digital coordinate generator onto a 2D focal plane array infrared detector. The method used in this form of the invention by the IR detector system, generates X-Y coordinate data for pixels containing detected target data. Advantageously, it reduces subsequent signal post processing required to generate the same data using numerical processing techniques in software and the latency that this introduces.

IR detector system and method

An infrared detector system is described which includes a detector diode arrayand a non volatile memory. The non volatile memorycan use CMOS Silicon Fuse technology which can be polysilicon devices that are programmed using voltage-current-time profiles suitable for the silicon process technology, such that when applied will cause the polysilicon element to heat up rapidly and melt. This results in the fuse element going open circuit, just like blowing a known fuse. The fuse can act as a logic element that has a one time, user programmable and permanent logic state. An array of such memory cells is can be mapped to a sub pixel diode detector array.

Infrared detector system and method

An Infra Red detector system and method is disclosed. There is benefit in providing signal processing functions into each pixel of a 2D focal plane IR detector for applications such as hostile target detection. The thermal characteristics of muzzle flash or a projectile and it's trajectory for example are distinguishable from background scene. A technique to add a signal detection function to normal IR detector thermal imaging operation to a standard direct inject Integrate While Read (IWR) pixel circuit and for providing target detection at extremely high data rates is described.

A system and method of reducing undesirable image artifacts such as image tear and image smearing are described. The system can include a series of pixels and enhanced sensitivity circuits. The circuit can be configured so as to operate in an enhanced sensitivity mode having a combination of sample and hold circuits and binning functions, the combination acting so as to reduce the undesirable imaging artifacts.

An Infra Red detector system and method are disclosed for a SAR ADC capable of operation at low power and for use on a Focal Plane Array FPA) detector. High power consumption makes known converter approaches unattractive for use on Focal Plane Array (FPA) detectors that are to be cooled to cryogenic temperatures. Many such ADCs are used on a FPA detector (e.g., up to one ADC per column of the imaging array) to digitize image data for the whole array at standard frame rates. Increased power makes cooling difficult to achieve or unattractive at system level. An exemplary system as disclosed can use an adaptive approach to set the comparator gain and settling time depending on the dynamics of the input signal, thereby achieving specified performance while reducing overall power.

An imaging device is capable of on-chip processing data output by a series of pixels. The pixelsare arranged into a series of super pixels or tiles that together form a large area array. The pixelsare arranged into two groups, nominally group A (odd pixels) and group B (even pixels). Data from the individual pixelsis read out according to the relative position of the pixel within each group. The technique employed by the device allows the array data rate to be controlled dynamically by the super pixel information content. The output data bandwidth is increased at the expense of image spatial resolution where scene content contains large uniform areas (e.g. desert, sea, sky) that would otherwise generate huge amounts of similar data that carries little additional information.

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Basildon, United Kingdom

Peter Michael Thorne