Cisco Technology, Inc.

Peter Malcolm Barnes

Anthony Joseph Li

William L Lynch

Sharad Mehrotra

Nikhil Jayaram

John Joseph Williams, Jr

Oded Trainin

Paul Lachlan Mantiply

John Joseph Williams

Techniques for reducing latency associated with metaframe error correction. Embodiments receive, via a first port of a plurality of ports, a stream of bits within a metaframe. Upon evaluating a first cyclic redundancy check (CRC) for a first portion of the stream of bits and determining that the first CRC is valid, a measure of latency incurred in transmitting the first portion is reduced, relative to first performing forward error correction (FEC) decoding for the first portion prior to transmission, by transmitting the first portion of the stream of bits without performing FEC decoding for the first portion of the stream of bits. Upon evaluating a second CRC for a second portion of the stream of bits and determining that the second CRC is invalid, FEC decoding is performed for the second portion of the stream of bits before forwarding the second portion of the stream of bits.

Minimum latency link layer metaframing and error correction

Embodiments generally provide techniques for data framing and error correction for communications on a link. Embodiments include receiving a stream of bits within a metaframe. Upon determining that a cyclic redundancy check (CRC) for a portion of the stream of bits is valid, the portion of the stream of bits is forwarded without performing forward error correction (FEC) decoding for the first portion. Upon determining that a CRC for the portion of the stream of bits is invalid, FEC decoding is performed for the portion before forwarding the portion of the stream of bits. Embodiments also include generating a metaframe for transmission over a link, and upon determining that a current measure of network throughput is less than a predefined threshold amount of network throughput, inserting one or more checkpoints into the metaframe to create different segments of the metaframe. The metaframe is then transmitted over the link.

A network device routes data packets by storing the packets in a switching memory as a function of a destination address of the packet. The switching memory comprises switching memory queues that are mapped to ports of the device. A header of a received packet is examined to determine the network destination address to which it is to be routed, and a destination queue is assigned to the packet based on the destination address. Thereafter, the packet is divided into cells, and the cells are written to contiguous locations in the destination queue.

Packet routing and switching device

A method for routing and switching data packets from one or more incoming links to one or more outgoing links of a router. The method comprises receiving a data packet from the incoming link, assigning at least one outgoing link to the data packet based on the destination address of the data packet, and after the assigning operation, storing the data packet in a switching memory based on the assigned outgoing link. The data packet extracted from the switching memory, and transmitted along the assigned outgoing link. The router may include a network processing unit having one or more systolic array pipelines for performing the assigning operation.

Methods of routing and switching a packet from an incoming link to an outgoing link of a router. In one example, the method includes assigning a destination queue to the packet, determining if the router is implemented in a scaled-down configuration, remapping the destination queue to one or more remapped destination queues, and storing the packet in the one or more remapped destination queues. In one embodiment, the method may also include requesting a packet from the destination queue, translating the request to the remapped destination queue, and transmitting the packet from the remapped destination queue.

Scalable packet routing and switching device and method

A router and method therefore for routing and switching a packet from an incoming link to an outgoing link. The router may include a plurality of network processing units, a plurality of switching engines, and a plurality of connections between the plurality of network processing units and the plurality of switching engines defining a rotational symmetric topology. The router may also include a means for connecting the plurality of network processing units to the plurality of switching engines, as well as means for connecting the plurality of switching engines to the plurality of line card units. In one example, the plurality of line card units is connected with the plurality of switching engines in a full mesh topology.

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Mountain View, CA, United States of America

Peter Malcolm Barnes