Emu Solutions, Inc.

University of Notre Dame Du Lac

Lockheed Martin Corporation

Cray Incorporated

Lucata Corporation

Peter M Kogge

Burton Jordan Smith

Charles David Callahan, Ii

David Tennyson Harper, Iii

Vincent John Smoral

Edwin T Upchurch

Jay B Brockman

Phillip J Sementilli, Jr

A system and method for identifying from an address an appropriate target node and a location in that node that holds desired data related to that address is provided. The system and method includes a logical address generator that generates a logical address. The system and method includes a subspace index extraction module that extracts a subspace index from the logical address. The system and method includes a subspace configuration table that retrieves a plurality of parameters of the subspace index to locate the desired data.

Highly configurable memory architecture for partitioned global address space memory systems

A memory storage system is that includes a memory element having a memory address for a physical memory. A memory controller receives a command for accessing the memory element using a program-generated address and dynamically transforms the program-generated address into the memory address for the physical memory using a rotation module and configuration information. A data word accessed by the physical address is then provided to a set of arithmetic logic units (ALUs) where multiple computations are performed simultaneously so as top reduce program execution time and energy. The configuration information provided to the rotation unit configures the set of ALUs.

Reducing memory accesses for enhanced in-memory parallel operations

A system for governing the spawning of a thread from a parent thread by an application in a processor is provided. The system includes a first multiplexor module that selects from one or more registers a policy used to spawn a thread, and makes the policy available for execution. A second multiplexor module selects one or more of the policy values used in a spawn process whose policy was selected by the output of the first multiplexor module, the second multiplexor module outputs a first signal indicative of the selected policy value to accompany the selected policy, which may be given to the child thread as its initial spawn count when the policy so indicates. A third multiplexor module selects either the first signal or a null where the selected policy value of the first signal is used to update the remaining thread credits of the thread's parent.

Concurrency control mechanisms for highly multi-threaded systems

A memory controller is provided that includes a host system interface that receives requests from applications and sends read or write commands to a disk for data retrieval. A threadlet core provides threadlets to the host system interface that enable the host system interface to use a logical bit address that can be sent to a memory device for execution without having to read and write entire blocks to and from the memory device.

Exporting computational capabilities into a block-oriented disk memory

A topology for routing message traffic between interconnecting nodes of a network is provided that includes a plurality of rings having a plurality of interconnecting nodes. A number of trees include at least one leaf at a same relative position of the rings. The trees and the rings form a unique combination that provides superior network performance for moderate numbers of the interconnecting nodes, wherein each interconnecting node has only a limited ability to handle a plurality of links.

Interconnect topology with reduced implementation requirements

A method that includes activating and deactivating two counts between an active state and not an active state such that no more than one count at a time is in an active state. The method also includes receiving a request packet of information that requires a reply and incrementing the count that is in an active state, and setting a flag in the request packet of information that requires a reply, the flag being set to correspond to the count that is in the active state. The method further includes receiving a reply packet of information corresponding to a previously received request packet of information, the reply packet of information having a flag setting corresponding to the previously received request packet of information, and decrementing the count that corresponds to the flag setting of the reply packet of information. A network is also disclosed.

Response time detection in a network having shared interfaces

Embodiments of the present invention provide a class of computer architectures generally referred to as lightweight multi-threaded architectures (LIMA). Other embodiments may be described and claimed.

Computer systems with lightweight multi-threaded architectures

A computer system comprising: a plurality of memories each containing one or more locations; and a first threadlet for causing a first program to run in the computer system when at least one first memory location of the plurality of memory locations is local to the threadlet. Also provided is a method allowing such a threadlet to move itself to memories that include some specified second memory location.

Architectures for self-contained, mobile, memory programming

Processing requirement at each computing element in a video server for a video on demand (VOD) system are reduced to only those needed for VOD, resulting in a less expensive processor with less memory and, hence, lower cost. A hybrid video server architecture combines the best features of massive parallel processor (MPP) and workstation designs into a cost effective high performance system. Since it is not necessary to run a parallel relational database program in order to accomplish VOD data distribution, a unique type of switch element that is well matched to the VOD server problem is employed. By matching this switch element technology to an appropriate data storage technique, a full featured, responsive VOD server is realized that can be affordably installed at regional cable distribution centers nationwide.

Growing community of inventors

Granger, IN, United States of America

Peter M Kogge