Lockheed Martin Corporation

Peter L Delos

Francis Xavier McGroary

Douglas A Leonard, Jr

Edward F Gross

Brandon R Davis

Steven M Fireman

David B Zaff

Matthew W Smith

A method of producing a low spurious output signal in a frequency generator circuit comprises, in a direct digital synthesizer (DDS), generating a signal at a first frequency; mixing the signal to produce a signal at a second frequency in an operating band of interest higher than the first frequency; determining spurious signals in the second frequency signal due to non-linearity in a digital to analog converter (DAC) of the DDS; generating at least one amplitude and frequency vector containing information relating to an amplitude value and frequency value representative of one of the determined spurious energy signals; generating a pre-distortion signal based on the at least one amplitude and frequency vector; and combining the pre-distortion signal with the signal generated by the DDS to produce a corrected output signal, wherein the pre-distortion signal is phase offset from a corresponding determined spurious signal to cancel the corresponding determined spurious signal.

Method for reducing direct digital synthesizer (DDS) and mixer spurious

A waveform generator circuit provides low spurious output signal and includes a primary DDS for generating a RF signal at a first frequency. A DAC receives an output signal from the primary DDS and converts the digital DDS output to an analog output. A spectrum analyzer identifies spurious signals in the DAC output determining the amplitude and frequency characteristics of the spurious signals. The waveform generator includes at least one cancellation DDS configured to generate a pre-distortion signal corresponding to frequencies where spurious signals are expected due to non-linearities in the DAC circuitry. The pre-distortion signals are phase offset from the determined spurious signals to cancel the spurious signals. The pre-distortion signals are combined with the output of the primary DDS. The combined signal contains the primary DDS output signal and pre-distortion signals to produce an analog output signal which cancels out the expected spurious signals.

Method and system for reducing direct digital synthesizer (DDS) and mixer spurios

A frequency synthesizing circuit comprising a first mixer configured to receive a first input signal at a first input thereof, a first filter configured to receive an output signal of the first mixer and remove undesired signal frequencies from the output signal of the first mixer, and a feedback loop. The feedback loop includes a second mixer having a first input connected to the output of the first filter and a second input for receiving a second input signal. The second mixer is configured to mix a signal received at the first input with the second input signal. The feedback loop further includes a third mixer having a first input connected to an output of the second mixer and a second input for receiving a third input signal. The third mixer is configured to mix a signal received at the first input with the third input signal.

Frequency synthesizer system and method

An integrated circuit includes a clock distribution circuit and a logic block circuit. The clock distribution circuit is segregated from the logic block circuit to restrict contributors to phase noise to the clock distribution section of the circuit. The clock distribution circuit includes a front-end amplifier which buffers a clock input signal to a differential clock signal. The front-end amplifier is configured with as few components as possible and the components are selected for high current density and sized to minimize contributions to phase noise in the clock distribution circuit. The clock distribution circuit further includes an output latch circuit that receives the output signal of the logic block circuit and the low phase noise differential clock input signal from the front-end amplifier circuit. The output latch circuit re-clocks the final output of the integrated circuit. The output is representative of the output values determined by the logic block circuit.

Integrated circuit with low phase noise clock distribution network

A radio frequency receiver includes a first and second analog to digital converter (ADC) connected in parallel. Each ADC is coupled to a corresponding mixer that receives a local oscillator (LO) frequency signal and an analog input signal. Each LO down-converts the analog input signal to a band of frequencies falling within the band of operation of the LO's corresponding ADC. The frequency is selected such that each LO down-converts the input signal such that a portion of the operating band of each LO overlaps. For frequencies falling within the overlapped region, each ADC samples the overlapped frequency band and the corresponding outputs of the parallel ADCs are coherently summed to provide an output having up to about 3 dB improvement in SNR. For sampled frequencies outside the overlapped frequency range, a single corresponding ADC samples the signal which is down coverted and equalized to generate a direct output to expand the instantaneous bandwidth of the receiver.

Radio frequency receiver with overlapped analog to digital converter (ADC) architecture

A frequency synthesizing circuit comprising a first mixer configured to receive a first input signal, a first filter configured to receive an output of the first mixer and to remove undesired frequency signals from the output signal of the first mixer, and a feedback loop configured to provide an output of the first filter to an input of the first mixer. The feedback loop comprises a second mixer arranged within the feedback loop configured to receive the output of the first filter and to mix the output of the first filter with a second input signal.

Offset regenerative frequency divider

A method for determining the phase characteristics of a nonlinear analog device includes application of a test signal, which may be linear-FM, to the nonlinear device. The converted signal is digitized and mathematically converted to baseband in ideal fashion. A digitized version of the original test signal and the downconverted signal are phase compared to determine the phase error.

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Mount Laurel, NJ, United States of America

Peter L Delos