Delco Electronics Corporation

Gm Global Technolgoy Operations, Inc.

Peter J Schubert

Mark Billings Kearney

John Carl Christenson

Steven E Staller

Dan Wesley Chilcott

Robert J Wallace

Nadeem S Alvi

A motion sensor including a sensing wafer with a bulk micromachined sensing element, and a capping wafer on which is formed the conditioning circuitry for the sensor. The sensing and capping wafers are configured such that, when bonded together, the capping wafer encloses the sensing element to form a monolithic sensor. The capping wafer is further configured to expose bond pads on the sensing wafer, and to enable singulation of the two-wafer stack into individual dies. Wire bonds can be made to both wafers, such that the sensor can be packaged in essentially any way desired.

All-silicon monolithic motion sensor with integrated conditioning circuit

A method is disclosed for forming laterally grown epitaxial silicon without the requirement for subsequent thinning or planarization of the epitaxial silicon. Generally a low, wide cavity consisting of walls of dielectric material and having a side opening, or via hole, is formed and the epitaxial silicon is then selectively grown within the cavity. The resulting epitaxial silicon structure is characterized by being flat and wide with an aspect ratio of approximately 6 to 1.

Confined lateral selective epitaxial growth

A metal-oxide semiconductor field-effect transistor (MOSFET) device having an insulating barrier buried in the substrate between the device's source and drain regions. The insulating barrier can be in contact with the source region of the MOS device. The barrier is implanted in the substrate through a masked implantation of high doses of oxygen, followed by an annealing of the oxygen to form the silicon dioxide insulating barrier. The insulating barrier can be either discrete or part of a continuous sheet of silicon dioxide placed below the silicon substrate. Placing the insulating barrier between the source and drain regions substantially diminishes the punch-through effect of subsurface currents, thereby increasing the punch-through voltage. This permits the construction of MOS devices having shorter channel lengths with resulting higher circuit density and greater speed.

Insulated gate FET having a buried insulating barrier

An MOS transistor having relatively low parasitic capacitances is achieved by forming a dielectrically isolated mesa on a monocrystalline substrate. Such mesa includes a polycrystalline silicon region that serves as a gate region and an oxide layer that serves as a gate oxide. Subsequently, such mesa is made to sit on a platform, arising from the silicon substrate and surrounded by a sea of silicon dioxide originally at the level of the bottom of the mesa. The level of this sea is lowered to expose opposed sides of the platform to which is grown separate regions of lateral epitaxial silicon that serve as the source and drain of the transistor.

Self-aligned silicon MOS device

A process for growing silicon on insulator in which complete isolation of the grown silicon of the substrate silicon by an intermediate oxide layer is obtained. A first epitaxial lateral overgrowth technique is used to grow a continuous layer of silicon through seed holes in a patterned oxide layer overlying the silicon substrate. Then the silicon layer is etched to expose the seed holes which are then oxidized to make the oxide layer aperture-free. This is followed by a second epitaxial lateral overgrowth step to replace the silicon etched in the silicon layer to make the layer substantially planar.

Process for growing silicon-on-insulator wafers using lateral epitaxial

A method of fabricating a self-aligned hole-within-a-hole structure which resolves the smaller hole at small dimensions by using a single photolithography step to define the two holes, the step being performed on a planar surface. The method comprises fabricating a block on a substrate having the dimension of the smaller hole, fabricating a sidewall spacer on the block such that the spacer and the block have the dimension of the larger hole, growing a first layer surrounding the sidewall spacer, removing the sidewall spacer, growing a second layer surrounding the block which is thinner than the first layer, and removing the block.

Doubly-self-aligned hole-within-a-hole structure in semiconductor

A method of fabricating single crystal silicon in a 'mushroom' shape for use in fabricating devices such as a Silicon-On-Insulator-Like MOSFET. One embodiment of the inventive method entails fabricating a hole-within-a-hole structure in a thick silicon dioxide layer disposed on a single crystal silicon substrate, growing single crystal silicon in the inner hole, etching back the silicon dioxide layer to expose a portion of the silicon in the inner hole, and growing single crystal silicon by selective epitaxial growth in the outer hole.

Semiconductor mushroom structure fabrication

A process for forming MOS transistors in which the source and drain regions essentially interface only the channel portion of the silicon substrate to keep parasitic capacitances low. To this end, a monocrystalline silicon substrate has one major planar surface covered with a layer of silicon oxide and a hole formed in the oxide layer of a size suited for the channel of the transistor. Then silicon is epitaxially grown vertically to fill the hole. The grown silicon is then covered. Next, portions of the oxide layer are removed to expose a pair of opposed vertical sidewalls of the vertically grown silicon and silicon is epitaxially grown laterally out of said exposed sidewalls. Such laterally grown regions serve as the source and drain of the transistor and an upper portion of the vertically grown silicon serves as the channel. A gate oxide is grown over a top portion of the vertically grown silicon and a polysilicon gate region is formed over the gate oxide. The gate region then serves as a mask which allows the laterally grown drain and source regions to be doped and to be self-aligned to the gate region.

Growing community of inventors

Kokomo, IN, United States of America

Peter J Schubert