Konica Minolta Systems Laboratory, Inc.

Konica Minolta Laboratory U.s.a., Inc.

Apple Inc.

Minolta Company, Ltd.

Peter J Johnston

Shawn Xavier Arnold

Christine A Laliberte

Anne M Mason

Dominic P McCarthy

Souvik Mukherjee

William O Ferry

Isao Hayami

Neal V Cecil

Allan Hessenflow

Reese A Schreiber

Aaron J Barber

Steven P Hier

Clinton Bauder

Robert Il McKeever

Keiichiro Hyodo

Circuits, methods, and apparatus where a dongle or adapter may provide continuous power in the event of a disconnection of a charging device. One example may provide a dongle having a charge storage circuit. A charging device connected to the dongle may be used to power an accessory also connected to the dongle. Following a disconnection of the charging device, the dongle may use the charger storage circuit to provide power to the accessory for a first duration. After the first duration, a host device also connected to the dongle may provide power to the accessory via the dongle.

Charge storage and power routing for dongles and adapters

A routing apparatus includes a PCB having first and second arrays of contact pads, an interposer having third, fourth and fifth arrays of contact pads, the third and fourth arrays of contact pads being disposed on opposing surfaces of the interposer, the third array of contact pads being electrically connected to the first array of contact pads. First and second integrated circuits are respectively mounted on the second and fourth arrays of contact pads. The interposer includes a first group of conductive traces insulated from one another, a first array of conductive vias extending perpendicularly to the first group of conductive traces, the first array of conductive vias including through-vias connecting the third array of contact pads to corresponding contact pads in the fourth array of contact pads. The interposer further including isolation resistors embedded within the first array of conductive vias, each isolation resistor being configured to produce a copy of a signal flowing through the conductive via that is coupled to one end of the isolation resistor on the conductive trace that is coupled to an opposite end of the isolation resistor.

Techniques for observing an entire communication bus in operation

A circuit board includes conductive traces being sandwiched by an upper insulating layer and a lower insulating layer, a first array of conductive vias extending perpendicularly to the conductive traces, the vias in the first array of conductive vias being arranged such that any two adjacent vias in a row of vias extending along any given dimension in the first array of conductive vias are equally spaced from each other, and isolation resistors embedded within the first array of conductive vias such that each isolation resistor is disposed between at least two adjacent vias in the first array of conductive vias, each isolation resistor being disposed closer to the conductive via to which the isolation resistor is coupled than all other conductive vias surrounding the isolation resistor.

An apparatus associated with a printing device having a plurality of print engines comprising a first print engine and at least one second print engine is provided. The apparatus comprises a pixel clock generating module which generates a reference signal operating at a single video frequency derived from a first clock and the at least one first print engine. The apparatus further comprises a color data modification module which modifies the color data for the at least one second print engine based on an accumulated phase error for at least one second print engine, wherein the accumulated error is calculated based on calibration information for the at least one second print engine relative to the at least one first print engine.

Apparatus, system, and method for color data printing

Systems and methods are provided for correcting color registration errors in a printing device comprising a plurality of print engines driven by a single pixel frequency clock. In some embodiments, the print engines can include a reference print engine and one or more non-reference print engines. An adjusted resolution may be computed for color data sent to each non-reference engine to offset color registration errors attributable to the non-reference engine. The adjusted resolution is computed using calibration information for the non-reference print engines relative to the reference engine, and resolution information for color data processed by the first reference engine. The resolution of color data processed by each non-reference print engine is adjusted according to the computed adjusted resolution for the non-reference engine and sent to the print engines for printing.

Systems and methods for reducing color registration errors in tandem engines

Systems and methods are provided for reducing data size of at least one bitmap image, wherein the bitmap image comprises a plurality of image components, wherein each image component is associated with a distinct color plane. The plurality of color planes may be ranked using a dominance rank, wherein the dominance rank for a color plane is based on data in its associated image component. The data size of the at least one image component may be reduced based on the dominance rank of the color plane associated with the image component.

Systems and methods for color data compression

Systems and methods are provided for switching a resolution of an image, wherein the image includes at least one block. In some embodiments, the image is compressed. At least one compressed block in the compressed image is tagged, if the data size of the compressed block exceeds a threshold. A non-transition region is grown based on the at least one compressed block that is tagged until a safe-transition block is reached, wherein the non-transition region includes the at least one compressed block in the compressed image. The resolution of each compressed block in the non-transition region is reduced.

Systems and methods for resolution switching

Systems and methods are provided for reducing data size of at least one bitmap image, wherein the bitmap image comprises a plurality of color blocks, wherein each color block is associated with a distinct color plane. In some embodiments, the bitmap image may be compressed. At least one compressed color block that is contained in a transfer frame may be determined, based on information pertaining to a physical offset between successive color planes when they are rendered on a print medium. Further, at least one compressed color block in the transfer frame may be tagged, if the size of the transfer frame exceeds a threshold, and the resolution of the at least one compressed color block that is tagged may be reduced.

Systems and methods are provided for reducing data size of at least one bitmap image comprising at least one block, wherein the block comprises a plurality of image components, each image component being associated with a distinct color plane. The method may include compressing the plurality of image components of the at least one block. The method may further include ranking the plurality of image components using a dominance rank, wherein the dominance rank for an image component is based on a compression ratio for the image component. The method may also include reducing the resolution of at least one image component associated with the block, based on the dominance rank of the color plane associated with the image component.

An apparatus and method for processing pixel data is presented that includes an image forming apparatus that includes an image forming module coupled to a data control module that comprises a plurality of memory units, wherein each of the memory units stores a corresponding portion of pixel data of an image. The data control module writes out portions of pixel data stored in corresponding memory units to the image forming module and dynamically associates each memory unit with a further portion of pixel data after its corresponding portion of pixel data has been written out.

Systems and methods for processing pixel data for a printer

An apparatus and method for processing pixel data is presented that includes a plurality of image forming modules coupled to a data control module. The data control module includes a plurality of memory units. Each memory unit can store a portion of an image. The data control module receives a first signal and a second signal and selects at least one of the plurality of image forming modules to send the image portions stored in the plurality of memory units based on a timing relationship between a first image alignment event on the first signal and a second image alignment event on the second signal.

An imaging device with an improved controller is disclosed wherein the controller eliminates duplicated circuitry and provides multiuser circuitry that efficiently replaces multiple dedicated circuit blocks. In one aspect, duplicated same-function circuit blocks are replaced with a switch controlled by an alignment control signal to operate as a multiplexer or demultiplexer. In another aspect, multiple different-function circuit blocks which generally have no temporal overlap of their active operation are replaced with a programmable logic device that is reconfigured dynamically to perform some subset of the different functions on an as-needed basis.

Interleaving imaging device controller with multi-use circuitry

Systems in accordance with the presently claimed invention use input data to create an output pulse that is a fraction of the width of an input pulse. In some embodiments, the invention accepts input data and an input signal that has pulses of a specific frequency. In some embodiments, the invention uses a phase lock loop to create multiple signals of a higher frequency than the frequency of the input signal. Each of these multiple signals is offset by a certain phase from the other signals. In some embodiments, the invention synchronizes the input data to each of these multiple signals. The invention uses the phase difference between the multiple signals to create an output pulse as a function of the input data that is a fraction of the width of the input pulse.

Systems for generating a pulse width modulated signal

Apparatus, systems, and methods presented herein allow for the alignment of images. In some embodiments, a plurality of PWM modules each receive input data and corresponding input phase-shifted clock signals. In some embodiments, each PWM module generates an output phase-shifted PWM signal based on the input data and its corresponding input phase-shifted clock signal. In some embodiments, a selector selects one of the output phase-shifted PWM signal based on timing relationships between an event signal and the phase-shifted clock signals.

Method and apparatus for image alignment

The methods and systems presented herein use well-known logic devices in combination with one or more pulse-width-modulation (PWM) devices in order to create left- and right-justified width-modulated pulses. In some embodiments, justification ability is added without the need to alter an existing PWM device. In some embodiments, the generation of justified pulses is accomplished by a logic circuit in combination with an inherently left- or right-justified PWM device. Some embodiments of the present invention may include, for example, any combination of logical selectors, inverters, and flip-flops. In some embodiments, a justification circuit may receive as input any combination of one or more bits of pixel data, one or more bits of justification selection data, and one or more clock signal. In some embodiments, a justification circuit may output one more signals representing left or right-justified pulses.

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San Francisco, CA, United States of America

Peter J Johnston