Allen-Bradley Company, LLC

Peter J Boldt

Daniel J Galdun

Tina L Vrabec

Amy J Wallaert

James J Kay

Scot A Tutkovics

A data control system having a host microprocessor, a data receiving device and a DMA controller. The DMA controller being used to control the fragmentation and recombination of a buffer memory area. The data being processed in data packets and using DMA buffer chaining.

Dynamic buffer fracturing by a DMA controller

A system for scheduling periodic events having varying rates. The system uses a linked list type data structure and an array to schedule the plurality of events having varying rates. In a preferred embodiment of the invention, data items are scheduled for transfer during a plurality of data transfer intervals. The linked list type data structure is traversed for each data transfer interval to collect the data items requiring transfer.

System for scheduling periodic events having varying rates by cascading

A controller based network, where data from a plurality of nodes is placed onto the network in a scheduled predetermined order during a network update interval. The data transmitted onto the network being collected following the issuance of a data collection start signal issued in accordance with a timer, whereby the issuance of the data collection start signal can be varied within the network update interval. The collected data being transmitted onto the network upon the issuance of a data transmission signal.

System using a variable timer to optimally adjust issuing a start data

A processor-based control system including a host processor, a data receiver device, a system memory, and an intelligent DMA controller. The DMA controller includes a pre-parsing section. The pre-parsing section interrogating a received data packet to determine whether the received data packet contains an error, is valid, is a null packet or whether the host processor must be contacted.

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W. Farmington, OH, United States of America

Peter J Boldt