Lucent Technologies Inc.

U.S. Philips Corporation

Alcatel-lucent USA Inc.

Peter Hessler

Maarten Petrus Joseph Vissers

Manfred Alois Loeffler

Jurgen Leonhard Milisterfer

Bernd Selbach

Manfred Schmidt

Viswanath Poosala

Mansoor Ali Khan Alicherry

Sudipta Sengupta

Michael Behrens

Walter Rothkegel

Improved p-cycle restoration techniques using a signaling protocol are disclosed. For example, a technique for use in at least one node of a data communication network for recovering from a failure, wherein the data communication network includes multiple nodes and multiple links for connecting the multiple nodes, comprises the following steps/operations. Notification of the failure is obtained at the at least one node. A determination is made whether the failure is a single link failure or one of a node failure and a multiple link failure. A pre-configured protection cycle (p-cycle) plan is implemented when the failure is a single link failure but not when the failure is one of a node failure and a multiple link failure, such that two independent paths in the network are not connected when implementing the pre-configured protection cycle plan. Implementation of the pre-configured protection cycle plan may further comprise the node sending at least one message to another node in the data communication network and/or receiving at least one message from another node in the data communication network.

Signaling protocol for p-cycle restoration

A method and system are provided for the detection and compensation of frame offset discontinuities for tandem connection trails in general and especially to frame offset discontinuities occurring at the entrance of a network element in a Synchronous Digital Hierarchy (SDH) and Synchronous Optical Network (SONET) system. More specifically, a method of transmitting data in a synchronous hierarchic network system comprising at least a path segment between a first network element and at least a second network element on which tandem connection monitoring (TC) method is established for monitoring transmission of information over the path segment is characterised by detection of frame offset discontinuities at the first network element on the basis of the detection of an alteration of the pointer value.

Detection and compensation of ingressing frame offset discontinuities for tandem connection trails

A method of transmitting in a synchronous hierarchic network system data is provided using at least a path segment between a first network element (A) and at least a second network element (F) on which a tandem connection monitoring (TC) method is established for monitoring information over the path segment. The method includes suppressing the insertion of all ones caused by the out of multiframe state subsequent to an interruption, distortion or switching operation of the signal transmission path for a predefined time interval.

Enhanced multiframe processing for tandem connection trails with transmission protection schemes

According to the invention a synchronous hierarchic network system and a method of transmitting data are disclosed using at least a path segment between a first network element and at least a second network element on which a tandem connection monitoring method is established for monitoring information over said path segment, and means for minimizing the signal interruption due to a loss of multiframe alignment subsequent to an interruption, distortion or switching operation of the signal transmission path.

Enhanced multiframe alignment for tandem connection trials

A circuit arrangement for establishing conference connections comprising conference units is described, which units are linked to form a loop (L). In this loop (L) sum codewords consisting of sample values of the signals of all participants in a conference are transmitted from one conference unit to the next. In each conference unit a sum codeword is updated so that the sample value of a conference signal from the previous loop travel is replaced by the current sample value. In order to enable the monotoring of a travel of sum codewords through the loop with a circuit arrangement of this type and in order to have the sum codewords pass through the loop in a predetermined brief period of time without a necessity for a synchronization of individual processing modules of the conference units, the function of one or more conference units is taken over by a programmed processor (P1 to P4). The exchange of data between the conferees and the processors is controlled by means of an interface circuit (PO). In addition to the sum codewords also test words consisting of transformed sum codewords pass through the loop (L). Sum codewords and test words are buffered in input memories (ES1 to ES4) during their travel through the loop until the associated processor (P1 to P4) has finished the program modules for which the sum codeword or test word respectively is used. These modules are programmed in the individual processors (P1 to P4) in a time offset order.

Circuit arrangement for establishing conference connections

A circuit arrangement for channel-specific processing of a multi-channel input signal which may consist of two types of encoded signals, a first type wherein all channel signals are encoded by a bit-oriented method (e.g., delta modulation) and a second type wherein all channel signals are encoded by a character-oriented method (e.g., PCM). An interface process (SSP), to which the input signal is applied, is coupled to a bidirectional interface (BIS) for signals of the first type and which is controllable by means of write and read addresses, and is also coupled to at least two such bidirectionally controllable interfaces (BI0, BI1, . . . BI7) for signals of the second type. The latter interfaces are respectively coupled to respective transcoder processors (AP0, AP1, . . . AP7). One or more data outputs of the interface (BIS) for signals of the first type are respectively coupled to respective ones of the transcoder processors (AP0, AP1, . . . AP7). The transcoded channel signals produced by such processors are transmitted via the interfaces (BIS, BI0, . . . BI7) to the interface processor (SSP), which combines them into a multi-channel output signal.

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Erlangen, Germany

Peter Hessler