Intel Corporation

Micron Technology Incorporated

Peter Hazucha

Tanay Karnik

Gerhard Schrom

Donald S Gardner

Vivek K De

Fabrice Paillet

Sung Tae Moon

Shekhar Yeshwant Borkar

Siva G Narendra

Trang T Nguyen

Edward Allyn Burton

Nitin Y Borkar

Howard A Wilson

Jae-Hong Hahn

Atila Alvandpour

Jaeseo Lee

Dinesh Somasekhar

Kaladhar Radhakrishnan

Krishnamurthy Soumyanath

Greg Dermer

Saravanan Rajapandian

Tsung-Hao Chen

Chung-Ping Chen

James W Tschantz

Ram K Krishnamurthy

Stefan Rusu

James W Tschanz

Stephen H Tang

Rajesh Kumar

Jianping Xu

Volkan Kursun

Weimin Shi

Tanay Kamik

Mary Bloechel, Legal Representative

A method is described comprising conducting a first current through a switching transistor. The method also comprises conducting a second current through a pair of transistors whose conductive channels are coupled in series with respect to each other and are together coupled in parallel across the switching transistor's conductive channel. The second current is less than and proportional to the first current.

DC-DC converter switching transistor current measurement technique

A multiphase DC-DC converter is provided that includes a multiphase transformer, the multiphase transformer including a plurality of input voltage terminals and an transformer output voltage terminal, each input voltage terminal associated with a corresponding phase. Each phase is assigned to an input voltage terminal of the plurality of input voltage terminals to minimize a ripple current at the input voltage terminals of the multiphase transformer.

Multiphase transformer for a multiphase DC-DC converter

Multiple-inductor embodiments for use in substrates are provided herein.

Integrated inductors

A comparator to provide an output voltage indicative of comparing an input voltage with a reference voltage, where the comparator has an asymmetric frequency response. With an asymmetric frequency response, the bandwidth of the input voltage may be greater than the bandwidth of the reference voltage. A comparator includes a differential pair of transistors coupled to a current mirror and biased by a current source, where in one embodiment, a capacitor shunts the sources of the differential pair. In a second embodiment, a capacitor couples the input voltage port to the gates of the current mirror transistors. In a third embodiment, the comparator utilizes both capacitors of the first and second embodiments.

High-speed comparator with asymmetric frequency response

A system is disclosed. The system includes a load, a voltage regulator circuit coupled to the load a power supply, a load coupled to the power supply to receive one or more voltages from the power supply, and a digital bus, coupled between the power supply and the load. The digital bus transmits power consumption measurements from the load to the power supply and transmits power consumption measurements from the power supply to the load.

Power delivery system in which VRM and CPU exchange power consumption measurements

Disclosed herein are pulse width modulator (PWM) solutions with comparators not relying on a variable reference to adjust duty cycle. In accordance with some embodiments, a pulse width modulator having a comparator with an applied adjustable waveform to generate a bit stream with a controllably adjustable duty cycle is provided.

Pulse width modulator with an adjustable waveform generator for controlling duty cycle of a pulse width modulated signal

Methods and associated structures of forming microelectronic devices are described. Those methods may include forming a first layer of magnetic material and at least one via structure disposed in a first dielectric layer, forming a second dielectric layer disposed on the first magnetic layer, forming at least one conductive structure disposed in the second dielectric layer, forming a third layer of dielectric material disposed on the conductive structure, forming a second layer of magnetic material disposed in the third layer of dielectric material and in the second layer of dielectric material, wherein the first and second layers of the magnetic material are coupled to one another.

Forming inductor and transformer structures with magnetic materials using damascene processing for integrated circuits

Some embodiments include a die having a transformer. The transformer includes windings formed from a set of lines, such that no two lines belonging to any one winding are nearest neighbors. The lines are formed within one layer on the die. Other embodiments are described.

On-die micro-transformer structures with magnetic materials

An inductor and multiple inductors embedded in a substrate (e.g., IC package substrate, board substrate, and/or other substrate) is provided herein.

Integrated inductor

Methods and associated structures of forming microelectronic devices are described. Those methods may include forming a first layer of a magnetic material on a substrate, forming an oxide layer on the first layer of the magnetic material, forming at least one conductive structure on the first magnetic layer, forming a dielectric layer on the at least one conductive structure, forming a second layer of the magnetic material on the at least one conductive structure, and forming a magnetic via coupled to the first and second layers of the magnetic material, wherein the magnetic via comprises a shape to increase inductance of the inductive structure.

Methods of forming magnetic vias to maximize inductance in integrated circuits and structures formed thereby

An integrated circuit (IC) package is disclosed. The IC package includes a first die; and a second die bonded to the CPU die in a three dimensional packaging layout.

Power management integrated circuit

An apparatus includes a magnetic core, a ground node, and one or more vias to provide a connection between the magnetic core and the ground potential. The magnetic core includes a first magnetic layer and a second magnetic layer. In addition, the apparatus may include a conductive pattern. The conductive pattern may be at a third layer between the first and second magnetic layers. The apparatus may be included in inductors, transformers, transmission lines, and other components using ferromagnetic cores or shields. Such components may be integrated on a chip or die.

Grounding of magnetic cores

Growing community of inventors

Beaverton, OR, United States of America

Peter Hazucha