Robert Boschgmbh

Peter Grosshans

Werner Fischer

Mathias Kugel

Kai-Lars Barbehoen

The digital interface unit ( ) for control of a peripheral device, especially for controlling a magnetic valve for an injection device, includes a plurality of output registers ( to ), which store and output a set of control variables applied to the input sides of the respective output registers in response to a control signal ( , MST E). So that the control variables are output from the output registers exactly simultaneously even though they are received sequentially, at least one group of buffer registers ( to to ) is connected to the output registers ( to ). The buffer register or registers provides intermediate storage for the control variables prior to output from the interface unit.

Digital interface unit with selective input registers providing control values to output registers that simultaneously output the control values when activated by control line

The external intelligent component ( ) connected with a microprocessor system ( ) is described for essentially automatic control of a control element ( ) without burdening the microprocessor system operation. The control parameters for the control element ( ) are written into a data memory ( ) of the external component ( ) from the microprocessor system ( ) and are read out internally from the data memory ( ) during normal operation of the external component ( ). Control of the external component ( ) is possible by the microprocessor system ( ) without blocking the system bus ( ) of the microprocessor system ( ) using a control line from the microprocessor to a reset input (RESET) of a controller ( ) of the external component ( ).

External components for a microprocessor system for control of plural control elements and operating method

A clock signal loading device for a processor of a controller connected to a network and a clock signal loading method are provided. The device includes a first oscillator for generating a clock signal that can be loaded to the processor, a controllable clock signal changer for changing the clock signal generated by the first oscillator, and a control device connected to the network for generating a control signal for controlling the clock signal changer as a function of the communication signals transmitted over the network. This device and method allows the frequency of the clock signal needed by the processor to be tuned in a simple and flexible manner.

Clock signal loading device and method

A method for detecting erroneously programmed memory cells of a memory, in particular for detecting overprogrammed memory cells of a flash semiconductor memory. The memory includes a plurality of memory cells, which can be subdivided into a number of blocks that can be erased as a unit, which in turn can be divided into a group of subblocks that can be programmed as a unit. The erroneous programming of a memory cell of a subblock causes each subblock of a number of subblocks that can be represented by an erroneously programmed subgroup to have a similarly erroneously programmed memory cell.

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Hochdorf/enz, Germany

Peter Grosshans