Industrial Technology Research Institute

Winbond Electronics Corporation

United Semiconductor Corp.

Peter Chang

Gary Y Hong

Joe Ko

Nai-Hao Kuo

Hsin-Tang Chien

Shu-Yi Yen

Jao-Ching Chen

A technique using a new diaphragm structure and support design is provided herein for microphones or structure designs for pressure sensing. The structure includes a set of capacitive structures. The capacitive structure has a combination of a diaphragm structure, a back plate structure and a surrounding micro-structure for fixing the diaphragm. After the diaphragm structure has deformed due to a pressure load, a gap between the back plate and the diaphragm is changed accordingly, and variation occurs in the capacitance value between the two parallel plates. By using the principle of the effect of capacitance value variation, the capacitive sensor causes the capacitance value to vary with the change in the sound, thus accomplishing the object of measuring.

Miniature acoustic transducer

An apparatus is provided to test a device, i.e. an interface card to a computer system or an IC chip. The apparatus communicates with the computer system via a first bus and communicates with the device via a second bus. The first and second buses are standard bus such as ISA bus, EISA bus, PCI bus, and AGP bus, etc. In the apparatus, three switch circuits respectively making connection of data/address lines, power lines and a reset line of the first bus to the second bus are provided. A test program executed in the computer generates a plurality of control signal to the apparatus. A control circuit, responsive to the plurality of control signals, controls individually and selectively the turn-on of three switch circuits. By test program running in the computer system, the function test of the device can be accomplished automatically without time-consuming power-off and re-initialization of the computer system.

Apparatus and method for testing add-on device of a computer system

A method of fabricating a high voltage semiconductor device. A semiconductor substrate doped with a first type dopant and comprising a gate is provided. A cap oxide layer is formed on the gate optionally. A first ion implantation with a light second type dopant at a wide angle is performed to form a lightly doped region. A spacer is formed on a side wall of the gate. A second ion implantation with a heavy second type dopant is performed, so that a heavily doped region is formed within the lightly doped region.

Method of fabricating high voltage semiconductor device

Growing community of inventors

Hsinchu, Taiwan

Peter Chang