Texas Instruments Corporation

Peter Chang

Jagadeesh Sankaran

Ching-Yu Hung

Shinri Inamori

Karl H Renner

Rajitha Padakanti

A processor includes a scalar processor core and a vector coprocessor core coupled to the scalar processor core. The scalar processor core is configured to retrieve an instruction stream from program storage, and pass vector instructions in the instruction stream to the vector coprocessor core. The vector coprocessor core includes a register file, a plurality of execution units, and a table lookup unit. The register file includes a plurality of registers. The execution units are arranged in parallel to process a plurality of data values. The execution units are coupled to the register file. The table lookup unit is coupled to the register file in parallel with the execution units. The table lookup unit is configured to retrieve table values from one or more lookup tables stored in memory by executing table lookup vector instructions in a table lookup loop.

Vector table load instruction with address generation field to access table offset value

Processor with table lookup processing unit

A vector processor includes a plurality of execution units arranged in parallel, a register file, and a plurality of load units. The register file includes a plurality of registers coupled to the execution units. Each of the load units is configured to load, in a single transaction, a plurality of the registers with data retrieved from memory. The loaded registers corresponding to different execution units. Each of the load units is configured to distribute the data to the registers in accordance with an instruction selectable distribution. The instruction selectable distribution specifies one of plurality of distributions. Each of the distributions specifies a data sequence that differs from the sequence in which the data is stored in memory.

Processor with instruction variable data distribution

System and method for digitally correcting time base errors in video display systems. A preferred embodiment comprises 1) correcting time base errors in a first portion of a horizontal line of video information, wherein the first correcting makes use of an error estimate for the horizontal line of video information and a preceding horizontal line of video information, 2) correcting time base errors in a second portion of a horizontal line of video information, wherein the second correcting makes use of an error estimate for the horizontal line of video information, and 3) repeating the first correcting and the second correcting for remaining horizontal lines of video information in the digitized video signal.

Time base correction in video systems

A microprocessor controlled color phase locked loop is provided which provides flexibility and adaptability for different television standards and sampling rates. Color burst phase error and color burst amplitude information are stored in data registers located at the output of the phase locked loop's low pass filter rather than at the output of the color demodulator.

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Colleyville, TX, United States of America

Peter Chang