Pitney Bowes Inc.

Other

Peter C DiGiulio

Edilberto I Salazar

Norman J Bergman

Henry Stalzer

David K Lee

Warren G Hafner

Francis E McDermott

Donald T Dolan

Robert J Tolmie, Jr

Kevin J O'Dea

Frank D Ramirez

Mark W Van Gorp

James L Vanderpool

Williams J Linkowski

William Berson

Michael L Ernandez

Ido Weisman

A method is disclosed for ensuring proper payment by a mailer for postage indicia printed by the postage meter of a mailing machine operated by the mailer. The method includes a series of steps carried out by the mailer in connection with the preparation of a discrete quantity of mail by use of a mailing machine which has the capability of determining and recording in a database various characteristics of the mail that affect the postage required for a postal facility to handle the mail, and generates a product usage profile of the mailer's history of mailing. The Post Office counts the mail, and then calculates an expected cost of the mailing using data from the mailer's product usage profile, and then compares that expected cost with the amount of postage credit funds remaining in the mailer's postage meter to determine whether it is likely that any fraud has occurred in the preparation of the mailing.

Method of verifying proper payment of postage

A postage meter control system includes a microcomputer having a programmable microprocessor. The microcomputer is in communication with a decoder integrated circuit (Decoder IC). The Decoder IC has a first write control flip-flop and a second write control flip-flop, as in the preferred embodiment there are redundant non-volatile memories. Each control flip-flop has an output to a respective AND gate. The Decoder IC includes a dual timer which has an output to the control flip-flops. As a result, when the microcomputer enters write routine, the timer releases the control flip-flops to allow the system to be write enabled. If the write routine encounters a error, resulting in the timer timing out, the timer resets the control flip-flop and communicates with the microcomputer to try a retry. A more detailed description, and other features and advantages will become apparent in conjunction with the detailed description of the preferred embodiment.

Electronic postage meter having memory write access second chance hard

The processing system controller is utilized in a mail processing system. The processing system controller provides process control over a plurality of processing subsystems which operate on a mailpiece traversing the processing system. The processing subsystems employing a plurality of prime movers controlled by the processing controller. The processing system controller includes a motor controller in bus communication with the prime movers for control of the prime movers. Sensors monitor the operating conditions and parameter of each subsystems and are in bus communication with a sensor controller. A random access memory (RAM) is in bus communication with the motor controller and the sensor controller. The motor controller and the sensor controller are programmed such that the motor controller can read from the RAM and the sensor controller can write to the RAM. The motor controller reads from the RAM at discrete time intervals and the sensor controller writes to the RAM at other discrete time intervals.

Mail processing system controller

In a moistener for moistening a mixed succession of objects of a substantially limited number of different height profiles and having a nozzle, methods for controlling movement of the nozzle are presented. These methods include a nozzle initialization process, a nozzle pre-positioning process and a nozzle holding process.

Envelope flap moistener having applicator pre-positioning

A sensor processor for cooperating with a drive controller in a high-speed mail-handling machine. The sensor procesor access periodically a plurality of sensors distributed throughout the machine, and then writes the sensor data to an NVM-RAM shared with the drive controller. Time-critical sensors are accessed more frequently than non-time-critical sensors.

Sensor processor for high-speed mail-handling machine

A sensor processor for cooperating with a drive controller in a high-speed mail-handling machine. The sensor processor access periodically a plurality of sensors distributed throughout the machine, and then writes the sensor data to an NVM-RAM shared with the drive controller. Time-critical sensors are accessed more frequently than non-time-critical sensors.

A moistening arrangement for moistening the flaps of envelopes comprising a guide path for guiding envelopes, a moistener, an arrangement for moving the moistener transversely of the guide path, a first drive for moving envelopes at a first speed onto the guide path, a detector for detecting the first speed, and a second drive for moving envelopes away from the guide path at a second speed. The first and second drives are spaced apart a distance less than the lengths of the envelopes. A sensor arrangement senses the widths of the flaps of envelopes at a determined position between the first and second drives, and a control arrangement is provided for controlling the position of the moistener as a function of the speed of an initial portion of the envelope, and as a function of the speed of a final portion of the envelope.

Control system for moistener

A moistening arrangement for moistening the flaps of envelopes comprising a guide path for guiding envelopes, a moistener, an arrangement for moving the moistener transversely of the guide path, a first drive for moving envelopes at a first speed onto the guide path, a detector for detecting the first speed, and a second drive for moving envelopes away from the guide path at a second speed. The first and second drives are spaced apart a distance less than the lengths of the envelopes. A sensor arrangement senses the widths of the flaps of envelopes at a determined position between the first and second drives, and a control arrangement is provided for controlling the position of the moistener as a function of the speed of the first means for an initial portion of the envelope, and as a function of the speed of the second means for a final portion of the envelope.

A communication network is comprised of a first, second, third and fourth controller node in line communication. Each controller node includes a microprocessor. Each microprocessor is programmable to respond to and generate data message bytes, each data byte having one start bit, eight data bits, one programmably settable bit and one stop bit. Each microprocessor is further programmable to respond only to a unique address-command data message byte from a message source node. The address-command byte is recognized because the settable bit is set. Each microprocessor is programmed to generate a reply message byte with the ninth bit not set and to then receive from the source node a message count byte followed uninterrupted by the data message bytes. Upon receiving a complete data message conforming to the received count of the count byte, the microprocessor then generates an acknowledgement byte.

Network and protocol for real-time control of machine operations

The communication network is comprised of a first, second, third, and fourth node. Each node has a transmit pin, a receive pin and a programmable microprocessor for generating messages to the transmit pin and for receiving messages presented at the receive pin for processing. The transmit pin of the first node is in line communication with the receive pin of the second node and third node and the transmit pin of said fourth node. The receive pin of the first node is in line communication with the transmit pin of the second node and third node and the receive pin of the fourth node. The microprocessors of the respective nodes are programmed to receive a message at the receiving pin uniquely addressed to the respective node and enabled thereby to respond only to the uniquely addressed messages.

Communication network and protocol for real-time control of mailing

An electronic postage meter with a non-volatile memory security circuit apparatus is disclosed. The security circuit comprises means for limiting the amount of time the memories may be continuously enabled, means for preventing simultaneous enabling of both memories and means for preventing the write enabling of a memory if the write enable signal is active before a memory select signal is active. The circuit prevents memory access when a conflict is sensed across in an output related to the non-volatile memories. The security circuit provides additional protection to the non-volatile memory so that valuable critical accounting information located therein cannot be modified or destroyed.

Postage meter with a non-volatile memory security circuit

The motor controller system controls the respective motors of a plurality of cooperative apparatus associated with a article processing system, the article processing system for performing a plurality of functions upon an article traversing the article processing system and comprises a motor driver board having a plurality of input channels and a plurality of respective output channels. The motors are in line communication with a respective one of the output channels of the motor driver board. A programmable microprocessor is in bus communication with the driver board's input channels. A plurality of sensors are respectively mounted to each of the apparatus and in bus communication with the programmable microprocessor, the sensors being strategically located on the apparatus to provide such information to the microprocessor as article size, position and velocity information and to provide apparatus operation information. The microprocessor is programmed such that a cycle is preformed at a desired frequency, each control cycle being divided into discreet time intervals during which respective time interval the microprocessor transmit motor control command information to the driver board for respective motors and during other of the time intervals the microprocessor reading information from the sensors.

Microprocessor system controller for mail processing system applications

A communication network comprised of a first, second and third controller node. Each of the controller nodes includes a microprocessor for generating and receiving data messages. The first nodes has a transmit pin in line communication with the receive pin of the second nodes and has a receive pin in line communication with the transmit pin of the second node. The third controller receive pin is in line communication with the transmit pin of the first node and its transmit pin is in line communication with the receive pin of the first node. The microprocessors are programmed to respond to and generate suitable formatted data message bytes. The microprocessors are further programmable to respond only to a unique address-command data message byte from the message source node. The microprocessor will then issue a reply message byte to the destination node. The transmitting node will then send a data message. Where the receiving node is the third node, a data message from the third node must then follow. The protocol is software implemented and includes means of detecting a message error and resolving transmission line content.

Communication protocol for a three nodes system having dedicated

The multiple channel servo system engages in bus communication with a micro-controller, motor driver for driving a plurality of motors and motor servo for providing servo information for selected ones of the motors. The micro-controller generates respective motion command profile information for each of the selected motors. RAM is provided for receiving and storing the motion command profile information from the micro-controller for the selected motors. The servo system sequentially compares the respective servo information with the respective motor command information and generating respective motor control information for the respective motor for causing the motor driver to cause the respective motor to closely track the respective motor command profile. RAM memory is also provided for receiving and storing microcode for each of the selected motors. The arithmetic logic unit (ALU) of the servo system can be selectively configurable for the selected motors in accordance with the microcode such that the arithmetic logic unit can be reconfigured to sequentially generate respective motor control information for the selected motors.

Multiple channel servo configuration

An electronic postage meter has an improved memory selection circuit wherein custom memory map decoder circuit with resolution down to a single byte location is used to provide selection enabling signals to insure the selection of an appropriate device only when the addresses appropriate to that device are communicated. In accordance with the invention, at least two nonvolatile memories are provided. Writing to either of these nonvolatile memories is inhibited unless one and only one memory is selected. The circuit also prevents the selection of either of the nonvolatile memories in the event that the write strobe signal to the memories is held active.

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Bridgeport, CT, United States of America

Peter C DiGiulio