International Business Machines Corporation

Other

Peter Anthony Franaszek

John Timothy Robinson

Vittorio R Castelli

Caroline Benveniste

Charles Otto Schulz

Luis A Lastras

Philip Heidelberger

Christos J Georgiou

Luis Alfonso Lastras-Montano

Robert Brett Tremaine

Dan Edward Poff

Joy Aloysius Thomas

David Michael Daly

Martin W Sachs

T Basil Smith, Iii

R Brett Tremaine

Luis Alfonso Lastras Montaño

Bulent Abali

Mark N Wegman

Howard Thomas Olnowich

Michael Edward Wazlowski

Alexander Thomasian

Francis P Carrubba

Thomas K Philips

Anujan Mangala Varma

Ashish Jagmohan

Michele M Franceschini

Gregory Michael Nordstrom

Martin Aureliano Hassner

Edward John Yarmchuk

Michael Raymond Trombley

Mohammad Banikazemi

Joseph M Mosley

Steven R Kunkel

David A Thompson

Albert X Widmer

Joseph C Elliott

Aaron Christoph Sawdey

Richard C Schneider

Thomas Norman Barker

Michael Ignatowski

Thomas Basil Smith, Iii

Roy Lee Adler

Paul J Brown

Robert Francis Lusch

Michel Hack

Kenneth R Lynch

Michel Henri Theodore Hack

Ting D Cheng

Bharat D Rathi

David D Grossman

Leon Skarshinski

Karl H Hoppe

Pantelis G Tsoucas

Thomas M Walker

Daniel Edward Poff

Walter Edgar Daniels, Jr

A shared ledger of transactions may be used for various purposes and may be later accessed by interested parties for ledger verification. Authenticity of transactions requires active measures to ensure transaction participants including parties to the transactions, observers to the transaction, etc., are providing accurate information for each transaction. One example method of operation may include one or more of performing one or more transactions between a subset of participants of a shared ledger system or subsystem which includes the subset of participants and witnesses assigned to the subset of participants, and synchronizing the one or more transactions exclusively by the subset of participants and the assigned witnesses, so the one or more of the transactions between the subset of participants exist with no common witnesses.

Scalable and distributed shared ledger transaction management

A shared ledger of transactions may be used for various purposes and may be later accessed by interested parties for ledger verification. Authenticity of transactions requires active measures to ensure transaction participants including parties to the transactions, observers to the transaction, etc., are providing accurate information for each transaction. One example method of operation may include one or more of identifying a set of participants to one or more transactions, transmitting a request from an initiating participant to enable each of the set of participants to generate local numbers based on a number source, forwarding the local numbers to one or more of the set of participants before expiration of a specified time interval, receiving the local numbers at the initiating participant, and generating a final number based on the local numbers received, so that after a last participant among the set of participants has forwarded the local number, none of the set of participants can obtain the final number until after a limited amount of time.

A compression engine and method for optimizing the high compression of a content addressable memory (CAM) and the efficiency of a static random access memory (SRAM) by synchronizing a CAM with a relatively small near history buffer and an SRAM with a larger far history buffer. An input stream is processed in parallel through the near history and far history components and an encoder selects for the compressed output the longest matching strings from matching strings provided by each of the near history and far history components.

Hybrid compression for large history compressors

Systems and methods are provided that schedule task requests within a computing system based upon the history of task requests. The history of task requests can be represented by a historical log that monitors the receipt of high priority task request submissions over time. This historical log in combination with other user defined scheduling rules is used to schedule the task requests. Task requests in the computer system are maintained in a list that can be divided into a hierarchy of queues differentiated by the level of priority associated with the task requests contained within that queue. The user-defined scheduling rules give scheduling priority to the higher priority task requests, and the historical log is used to predict subsequent submissions of high priority task requests so that lower priority task requests that would interfere with the higher priority task requests will be delayed or will not be scheduled for processing.

Prediction based priority scheduling

A computer system includes a plurality of multi-threaded processors, and a scheduler. The multi-threaded processors each have a set of hardware threads forming a pool of hardware threads. The scheduler allocates hardware threads of the pool of hardware threads to one or more guest operating systems based on priorities of the guest operating systems. The priorities of the guest operating systems are based on logical processors requested by the guest operating systems.

System and method for processor thread allocation using delay-costs

A method of transmitting compressed data from a main memory to an input/output adaptor (IOA)/input/output processor (IOP), includes sending compressed memory directory information to the IOA/IOP and copying a content of the memory to the IOA/IOP using a direct memory access (DMA) operation, without decompressing the data.

Method and system for storing memory compressed data onto memory compressed disks

A method for predicting a subsequent resource utilization in a computer system having a plurality of devices includes the step of monitoring, over a period of time, a contemporaneous resource utilization and a number of active devices to obtain monitored values of the contemporaneous resource utilization and the number of active devices. The subsequent resource utilization is predicted, based upon the monitored values of the contemporaneous resource utilization and the number of active devices. Additionally, methods are described herein for identifying resource saturation and predicting the effects of adding a new device in a computer system.

Method and apparatus for prediction of computer system performance based on types and numbers of active devices

In a computer system supporting memory compression, wherein memory compressed data is managed in units of memory sectors of size S, wherein data is stored on disk in a different compressed format, and wherein data on said disk is managed in units of disk sectors of size D, a method for storing memory compressed data on a compressed disk includes combining at least one of compressed memory directory information, a system header, compressed data controls, and pads into a data structure having a same size S as a memory sector, grouping the data structure and the data contained in the desired memory sectors into groups of D/S items, and storing each of the groups in a separate disk sector.

In a computer system supporting memory compression and wherein data is stored on a disk in a different compressed format, and wherein an IOA (input/output adaptor)/IOP (input/output processor) selectively reads from and writes to a main memory through a direct memory access (DMA) operation, a method for transmitting compressed data from the IOA/IOP to the main memory includes reserving a set of free memory sectors to contain the data in said main memory, sending to the IOA/IOP addresses of said memory sectors, copying the data from the IOA/IOP to said memory sectors using said DMA operation, constructing at the IOA/IOP compressed memory directory information defining how and where the data is stored in memory, sending the memory directory information to a memory controller, and storing the memory directory information in the compressed memory directory structure.

A system includes a processor, a memory, a cache, program software, and a marker management engine. The software includes at least one marker. Each marker is a computer instruction and marks distinct computer code sections in the software. The engine (a) determines whether one of the at least one marker is executed during the execution of the program software, (b) monitors data accesses by the at least one processor to the at least one cache and the main memory, (c) stores at least one of the monitored data accesses in a pre-defined location in the main memory, and (d) optimizes only the computer code section indicated by the determined marker of the program software executed by the at least one processor based on the stored data accesses.

Learning and cache management in software defined contexts

Computer memory management systems and methods are provided in which data block buffering and priority scheduling protocols are utilized in compressed memory systems to mask the latency associated with memory reorganization work following access to compressed main memory. In particular, data block buffers and priority scheduling protocols are implemented to delay and prioritize memory reorganization work to allow resources to be used for serving new memory access requests and other high priority commands.

Systems and methods for masking latency of memory reorganization work in a compressed memory system

The present invention describes lossless data compression/decompression methods and systems. A random access memory (RAM) operates as a static dictionary and includes commonly used strings/symbols/phrases/words. An input buffer operates as a dynamic dictionary and includes input strings/phrases/symbols/words. A set-associative cache memory operates as a hash table, and includes pointers pointing to the commonly used strings/symbols/phrases/words in the static dictionary and/or pointing to one or more of the input strings/phrases/symbols/words in the dynamic dictionary. Alternatively, the set-associative cache memory combines the dynamic dictionary, the static dictionary and the hash table. When encountering a symbol/phrase/string/word in the static or dynamic dictionary in an input stream, a compressor logic or module places a pointer pointing to the symbol/phrase/string/word at a current location on the output stream. The hash table may include phrases/symbols/strings/words and/or pointers pointing to phrases/symbols/strings/words.

Data compression using a nested hierachy of fixed phrase length static and dynamic dictionaries

A method (and system) of storing information, includes storing main memory compressed information onto a memory compressed disk, where pages are stored and retrieved individually, without decompressing the main memory compressed information.

Compressed memory systems are provided to reduce latency associated with accessing compressed memory using stratified compressed memory architectures and memory organization protocols in which a region of compressed main memory is allocated as a direct access memory (DAM) region for storing uncompressed data items. The uncompressed data items in the DAM region can be directly accessed, speculatively, to serve access requests to main memory, requiring access to compressed memory in the event of a DAM miss.

Systems and methods for reducing latency for accessing compressed memory using stratified compressed memory architectures and organization

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Mt. Kisco, NY, United States of America

Peter Anthony Franaszek