National Semiconductor Corporation

Peter A McNally

David Wingto Cheung

Norman E Abt

A multi-step plasma etch method for etching a tapered via having uniform bottom diameter ('CD') and extending through the resist and into the oxide layer of a coated semiconductor substrate, and a coated semiconductor substrate whose coating has been plasma etched to define such a tapered via. The first step of the inventive method is an anisotropic oxide plasma etch operation, preferably employing a plasma consisting primarily of CF.sub.4, which produces a non-tapered via having diameter substantially equal to CD and extending through the resist and into the oxide layer. A preferred embodiment of the inventive method includes a second step defining an upper sloping via portion without significantly increasing the diameter of a lower portion of the non-tapered via. This second step is a tapered resist plasma etch operation employing a mixture of oxygen (O.sub.2) and CF.sub.4. The slope of the upper sloping via portion may be controlled by varying the ratio of oxygen to CF.sub.4. In an alternative embodiment, the method produces a 'stepped' via having an upper non-tapered portion which extends through the resist and has an opening diameter substantially greater than CD, and a lower non-tapered portion which extends through the oxide and has diameter substantially equal to CD.

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Austin, TX, United States of America

Peter A McNally