Intel Corporation

Peter A Dice

Vincent J Zimmer

Rajesh Poornachandran

Peter J Barry

Gopinatth Selvaraje

Lee G Rosenbaum

Arjan Van De Ven

Julien Carreno

Eliezer Weissmann

Alon Naveh

Ohad Falik

Nadav Shulman

Robert E Gough

Michael Mishaeli

Douglas Raymond Moran

Erik C Bjorge

Julien CARREÑO

In an embodiment, a system on a chip includes: a single core to execute a legacy instruction set, the single core configured to enter a system management mode (SMM) to provide a trusted execution environment to perform at least one secure operation; and a memory controller coupled to the single core, the memory controller to interface with a system memory, where a portion of the system memory comprises a secure memory for the SMM, and the single core is to authenticate and execute a boot firmware, and pass control to the SMM to obtain a key pair from a protected storage and store the key pair in the secure memory. Other embodiments are described and claimed.

Providing a trusted execution environment using a processor

A mechanism is described for facilitating faster suspend/resume operations in computing systems according to one embodiment of the invention. A method of embodiments of the invention includes initiating an entrance process into a first sleep state in response to a sleep call at a computing system, transforming from the first sleep state to a second sleep state. The transforming may include preserving at least a portion of processor context at a local memory associated with one or more processor cores of a processor at the computing system. The method may further include entering the second sleep state.

Mechanism for facilitating faster suspend/resume operations in computing systems

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Chandler, AZ, United States of America

Peter A Dice