Harris Corporation

Conexant, Inc.

Xocyst Transfer Ag L.l.c.

Perry W Frogge

Carl F Andren

Steven D Halford

Leonard V Lucas

Jim Snell

William R Young

David H Damerow

John Christ Fakatselis

Cindy C Manion

Al Petrick

Cindy C Rauth

David H Damarow

A wireless receiver that sorts packets including a packet detector, multiple correlators, and multiple packet processors. Each correlator correlates a received signal according to packet type. Each packet processor processes the received signal according to packet type. A signal power detector may be provided to initially qualify the received signal as containing a packet, and the correlators determine whether a packet is present. The correlators may be configured for sequential or simultaneous correlation. For the simultaneous correlator configuration, a correlation monitor is provided to monitor correlation results to determine if the received signal contains a packet, and if so, to determine packet type. A low SNR packet detector may be provided which correlates the received signal to detect weak packet signals. The signal power detector may be omitted, where the correlators simultaneously monitor the received signal while a correlation monitor continuously monitors correlation results for packet detection.

Wireless receiver for sorting packets

A method of estimating signal quality in a radio demodulator receiving an input stream of symbols includes the steps of sampling a phase-only portion of each of the symbols in the input stream, determining a phase error for each of the samples of the phase-only portions, and calculating a signal quality estimate from a plurality of the sample phase errors. The signal quality estimate may be an average magnitude of a predetermined number of sample phase errors. The input stream may be symbols in the preamble, or symbols in the data signal that follows.

Method of estimating signal quality in a DPSK demodulator

A direct sequence spread spectrum receiver and method for acquiring radio-frequency signals is provided for acquiring data from signals which have been transmitted in a spread spectrum system. The receiver is capable of receiving short data bursts from transmitters without prior knowledge of the time or location of the transmission and rapidly acquiring the signal before continuing with reliable data demodulation. The system includes one or more antennae for receiving RF signals which may be selectively connected to provide the received signals to the system for processing, a quadrature demodulator for providing I and Q baseband signals to a digital baseband processor which includes A/D converters, dual correlators for despreading the digital I and Q signals, a cartesian to polar converter, a demodulator for demodulating the polar coordinate digital I and Q signals, and a data descrambler for obtaining a serial data stream which may be provided to a serial interface.

Short burst direct acquisition direct sequence spread spectrum receiver

A digital half-band filter with mutliplications using Wallace trees which have lower bits truncated for reduction in size and with a true/complementer providing saturation compensation together with accumulator overflow compensation by monitoring bits more significant than the output bits.

True/complementer for a half-band filter

Half-band filter and method

An enhanced current mirror circuit includes an auxiliary (by-pass) transducer that is effectively coupled in parallel with the current regulation transistor and the gate voltage of which is controlled by a (doped polysilicon) resistor voltage divider. The components of the voltage divider are configured to compensate for a reduction in the size of the principal current control resistor in the current regulation path of the mirror. The auxiliary current (bypass) control circuit effectively compensates for variations in parameters of the components of the current mirror circuit by controllably regulating (bypassing) current that would otherwise flow through the mirror's current control transistor. The voltage divider network is preferably comprised of a plurality of polysilicon resistor elements the configuration of one of which corresponds to the configuration of the principal current control resistor element. The width of another of the resistor elements of the voltage divider network is relatively large. As a result of these resistance parameters, output signal levels are essentially unaffected by material and dimensional changes. Also, the channel length of the bypass control transistor is shorter than that of the current control transistor in order to enhance its sensitivity to manufacturing and operational changes.

Current mirror employing controlled bypass circuit

Growing community of inventors

Palm Bay, FL, United States of America

Perry W Frogge