Intel Corporation

Penne Lee

Changliang Wang

Murali Ramadoss

Ankur N Shah

Ping Liu

Joseph Koston

Ning Luo

Ashwin Muppalla

Dmitry Ermilov

Jill MacDonald Boyce

Scott R Janus

Jason Daniel Tanner

Atul Divekar

Sumit Bhatia

Charlie Wang

Example methods, apparatus, systems and articles of manufacture (e.g., physical storage media) to implement multi-plane image (MPI) compression are disclosed. Example apparatus disclosed herein include an interface to access an input multiplane image stack corresponding to a source camera viewpoint, the input multiplane image stack including a plurality of texture images and a corresponding plurality of alpha images, ones of the alpha images including pixel values representative of transparency of corresponding pixels in respective ones of the texture images. Disclosed example apparatus also include a compressed image encoder to at least one of (i) convert the plurality of texture images to a single composite texture image to generate a compressed multiplane image stack, or (ii) convert the plurality of alpha images to a single composite alpha image to generate the compressed multiplane image stack. In some disclosed examples, the interface is to output the compressed multiplane image stack.

Multi-plane image compression

Methods, articles, and systems of computer graphics processing system validation for processing of encrypted image content are disclosed herein.

Method and system of computer graphics processing system validation for processing of encrypted image content

An apparatus and method for multi-adapter and/or multi-pass encoding on dual graphics processors. For example, one embodiment of a processor comprises: a central processor integrated on a first die, the central processor comprising a plurality of cores to execute instructions and process data; an first graphics processor integrated on the first die, the first graphics processor comprising media processing circuitry to perform one or more preliminary lookahead operations on video content to generate lookahead statistics; an interconnect to couple the first graphics processor to a lookahead buffer, the first graphics processor to transmit the lookahead statistics over the interconnect to the lookahead buffer; wherein the lookahead statistics are to be used by a second graphics processor to encode the video content to generate encoded video.

Apparatus and method for multi-adapter encoding

An apparatus and method for virtualized scheduling. For example, one embodiment of a graphics processing apparatus comprises: a graphics processor comprising a plurality of graphics processing engines, each of the graphics processing engines usable to execute graphics program code for a plurality of graphics contexts, each of the graphics contexts associated with a particular user mode driver (UMD); and a scheduler to schedule the graphics program code for execution on the plurality of graphics engines, the scheduler comprising an integrated context queue to store program code from all of the graphics contexts, the scheduler to select graphics processing engines to execute the program code from each context based on a detected load and/or availability of each graphics processing engine and to determine an order for executing the program code from each context based on relative priorities associated with the different contexts.

Apparatus and method for virtualized scheduling of multiple duplicate graphics engines

Techniques related to reference frame caching for video coding are described herein.

Method and system of reference frame caching for video coding

Techniques are disclosed for video playback decoding surface prediction. For instance, in some embodiments, video content may be parsed for information that can be used to predict what surfaces (e.g., computer graphics shapes to be rendered, as defined by vertices specifying the location and possibly other attributes of the shape) are most likely to be accessed, for example, by a display or a graphics processing unit (GPU) in the near future. In accordance with some embodiments, these surfaces may be pre-loaded, for example, into cache memory or other desired high-bandwidth memory in advance to minimize or otherwise reduce memory access latency. In some cases, these surfaces may be entered in a list that is kept updated with each new input frame, and the surfaces in that list may be kept inside the cache (or other high-bandwidth memory) for future display or GPU access.

Growing community of inventors

Bellevue, WA, United States of America

Penne Lee