Fudan University

Suzhou Oriental Semiconductor Co., Ltd.

Nv Bekaert Sa

Shanghai Ic R&d Center Co., Ltd

Infovision Optoelectronics (kunshan) Co., Ltd.

Savant Technologies LLC

Chengdu Image Design Technology Co., Ltd.

Shanghai Research Institute of Chemical Industry Co., Ltd

Kunshan Construct Engineering Quality Testing Center

Shanghai Xin Hao Biological Technology Company

Shanghai Lvqiang New Materials Co., Ltd

Shanghai Abup Technology Co.,ltd

Chinese Academy of Sciences

Pengfei Wang

Wei Zhang

Qingqing Sun

Xi Lin

Wei Liu

Lei Liu

Xiaoyong Liu

Yu Wang

Yi Gong

Zhichao Cheng

Chengwei Cao

Wei Wang

Weimin Liu

Wen Wen Yang

Xiuli Zheng

Tao Zhou

Jiebin Duan

Ying Gu

Shijin Ding

Fengching Chiu

Jiankao Chen

Jiasheng Wu

Wei Zhu Chen

Chen Bo Li

Cheng Chen

Hongyan Zhang

Xing Zhao

Fanbin Wang

Yuanlin Yuan

Peng Zhou

Xin Zhou

Rui Shen

Chengbin Liu

Hao Fu

Lingyi Guo

Yan Yan

Sun Yang Chen

Huanjiong Pang

Jia Zhang

Sheng Gu

Binbin Song

Bowen Xu

Yiwen Luo

Xingmei Cui

Longfei Zhang

Weining Bao

Zhongjun Ma

Runchen Fang

Huanzhang Zhu

Yongxian Zhou

Junhua Cai

Qiuping He

Yulong Wu

Chuncheng Li

Jiechao Ge

Hongxia Sun

Xueru Yu

Xiucui Wang

Liren Li

Rongwei Sun

Xuejing Wan

Chen Li

Zhongwei Huang

Xiaodao Sheng

The invention relates to the field of the Internet of Things, and in particular, to an OTA differential upgrade method and system of a master-slave architecture. The method comprises: Step S1, obtaining an upgrade scheme, and determining a master-slave connection relationship and an upgrade manner according to the upgrade scheme; Step S2, downloading a differential upgrading file; Step S3, determining a processing mode of a master node according to the upgrading manner of a slave node; if the upgrading manner of the slave node is a first manner, the node flashes and restores the differential upgrading file and sends the differential upgrading file to the slave node, so that the slave node completes upgrading; if the upgrading manner of the slave node is a second manner, the master node flashes and restores the differential upgrading file and sends the differential upgrading file to the slave node for upgrading.

OTA differential upgrade method and system of master-slave architecture

The present invention disclosures a critical dimension error analysis method, comprising: S: performing lithography processes on a wafer, measuring the critical dimension (CD) values of the test points in each of the fields respectively; M and N are integers greater than 1; S: removing extreme outliers from the critical dimension (CD) values; S: rebuilding remaining CD values by a reconstruction model fitting method, and obtaining rebuilt critical dimension (CD″) values, according to relative error between CD″ and CD, dividing the rebuilt critical dimension (CD″) values into scenes and the number of the scenes is A; S: calculating components and corresponding residuals of the test points in each of the scenes under a reference system corresponding to a correction model by parameter estimation; S: modifying machine parameters and masks by the correction model according to above calculation results. The present invention uses an outer limit to remove extreme outliers, so as to analyze a critical dimension error during a lithography process quickly and accurately.

Critical dimension error analysis method

The present invention relates to a regenerable hydrogen sulfide adsorbent and a preparation method thereof. The preparation method specifically includes: 1) combining meta-aluminate as an active component with activated alumina as a carrier in a manner of impregnation, spray coating or solid phase mixing to obtain a precursor; 2) aging and drying the precursor, and finally performing roasting to obtain the adsorbent; and 3) processing the adsorbent to present a specific size and shape through shaping measures to meet industrial application requirements. Compared with the prior art, the adsorbent obtained according to the present invention can achieve an efficient removal effect on hydrogen sulfide gas at a material inlet, with a concentration adaption range of 0 to 1000 ppm and an effective removal precision of 0.1 ppm or below.

Regenerable hydrogen sulfide adsorbent and preparation method thereof and application thereof

The disclosure relates to a device and a circuit for protecting controlled loads, and an apparatus for switching between the loads. The device includes: a plurality of load switches, comprising at least first and second load switches, wherein the first and second load switches are respectively in series connection with first and second controlled loads to form first and second controlled load branches in parallel connection, and each load switch is turned on when a switch control terminal is in a first voltage/current interval and turned off when the switch control terminal is in a second voltage/current interval; and a signal control module, including a signal control element, wherein the signal control element is switched between the switch control terminals of the first and second load switches for connection, and the signal control element enables, when being connected to the switch control terminal, the corresponding switch control terminal to be in the second voltage/current interval, and enables, when being disconnected from the switch control terminal, the corresponding control terminal to be in the first voltage/current interval.

Device and circuit for protecting controlled loads, and apparatus for switching between loads

The present invention discloses an image sensor for real-time calibration of dark current, including a pixel array comprises at least a pixel unit, the pixel unit includes a pixel photosensitive portion, a pixel dark shielding portion and a subtraction circuit, photodiodes in the pixel photosensitive portion and the pixel dark shielding portion are isolated by deep trench isolations, the pixel dark shielding portion are covered by a dark shielding layer; both of the pixel photosensitive portion and the pixel dark shielding portion adopt a same voltage and sequential control, a light ambient voltage signal and a non-light ambient voltage signal are generated and connected to both ends of a subtraction circuit to realize subtraction and dark current calibration. The present invention discloses an image sensor for real-time calibration of dark current, which can make the dark current calibration completed directly within the pixel, and can better cover the dark pixel part, so as to make calibration value of dark current and dark noise more accurate.

Image sensor for real time calibration of dark current and calibration method

The present invention discloses a method for recognizing multiple active capacitive styluses, a touch control unit, a touch panel, and a touch system. The method includes the steps of: obtaining recognization signals sent by multiple active capacitive styluses, and recognizing coordinates of each active capacitive stylus and its report point removing ghost point coordinates from the report point coordinates in a mutual capacitive mode of a work cycle of a touch panel, to obtain actual coordinates of each active capacitive stylus. The present invention accurately recognizes the specific positions of the multiple active capacitive styluses by eliminating the coordinates of the ghost points and has the advantages of high positioning accuracy and strong user experience.

Method for recognizing multiple capacitive styluses, touch control unit, touch panel and system

Provided in the present invention are ingenol compounds and a use thereof in preparing an anti-HIV latency drug. In particular, provided in the present invention is a use of ingenol compounds and pharmaceutically acceptable salts thereof for preparing a drug for: (a) intervening with HIV viral latency; (b) activating an HIV virus that has been integrated into mammalian genomes; and/or (c) inducing the expression of the dormant HIV provirus in infected cells. The compounds of the present invention may also be used in combination with antiretroviral drugs to accelerate the removal of latent viral reservoirs.

Ingenol compounds and use thereof in anti-HIV latency treatment

The invention provides a drop hammer height adjusting device for high strain detection of a pile foundation, the device comprises: a cross beam support frame, an avoiding hole is opened in the middle of the surface of the cross beam support; a track extending through the avoiding hole, a tooth group is arranged on each of two surfaces of the track bar, and abutting sliding blocks are further arranged at two sides of the track bar. The abutting sliding block is cooperated with the tooth group to limit the position of the track bar. The invention overcomes the significant disadvantages of the existing detection devices, the efficiency of obtaining qualified test signals is improved by the rapid and accurate height adjustment and test, and the precision and efficiency of high strain detection of a foundation pile are greatly improved.

Drop hammer height adjusting device for high strain detection of pile foundation

The present disclosure relates to the technical field of semiconductor power devices, and in particular relates to a semiconductor super-junction power device and a manufacturing method therefor. The super-junction power device of the present disclosure includes a termination region and a cell region; the cell region includes a substrate epitaxial layer and a drain region at a bottom of the substrate epitaxial layer, the substrate epitaxial layer has a plurality of pillar epitaxial doped regions and a plurality of JFET regions, a body region is arranged at a top of each of the plurality of pillar epitaxial doped regions; the body regions have at least two unequal widths; two source regions are arranged in each of the body regions; a gate oxide layer is arranged on the body regions and the JFET regions; and a gate is arranged on the gate oxide layer.

Semiconductor super-junction power device and manufacturing method therefor

The disclosure belongs to the technical field of semiconductor power devices, specifically relates to a semi-floating-gate power device, and comprises the gallium nitride high-electron-mobility transistor, the diode and the capacitor; the anode of the diode is connected with the gate of the gallium nitride high-electron-mobility transistor and the cathode of the diode is connected with the source or the channel area of the gallium nitride high-electron-mobility transistor; one end of the capacitor is connected with the gate of the gallium nitride high-electron-mobility transistor and the other end of the capacitor is connected with the external voltage signal. The semi-floating-gate power device has a simple structure, is easy to manufacture, adapts to high-voltage and high-speed operation and has very high reliability, can increase the threshold voltage of the gallium nitride high-electron-mobility transistor in the working state, so that the transistor can serve as the power switch tube better.

Semi-floating-gate power device and manufacturing method therefor

A touch panel includes a transparent substrate and a sensing pattern formed on the transparent substrate. The sensing pattern is in the form of a mesh structure. The mesh structure includes a plurality of conductive wires intersecting with each other to form a plurality of grids and a plurality of nodes connected between the grids. The grids are formed by the conductive wires intersecting with each other, and the nodes are formed at the intersection points of the conductive wires. The node has an annular shape with a center hole being defined in a center portion of the node. Due to the nodes having an annular shape, the surface resistance at the nodes is decreased and the signal attenuation is accordingly reduced. The conductive wires are connected firmly without the risk of breakage after the sensing pattern is formed.

Touch panel and display device

The present invention relates to a semiconductor photosensitive unit and a semiconductor photosensitive unit array thereof, including a floating gate transistor, a gating MOS transistor and a photodiode that are disposed on a semiconductor substrate. An anode or a cathode of the photodiode is connected to a floating gate of the floating gate transistor through the gating MOS transistor, and the corresponding cathode or anode of the photodiode is connected to a drain of the floating gate transistor or connected to an external electrode. After the gating MOS transistor is switched on, the floating gate is charged or discharged through the photodiode; and after the gating MOS transistor is switched off, charges are stored in the floating gate of the floating gate transistor. Advantages like a small unit area, low surface noise, long charge storage time of the floating gate, and large dynamic range of an operating voltage are achieved.

Semiconductor photosensitive unit and semiconductor photosensitive unit array thereof

The disclosure, belonging to the technological field of semiconductor memory, specifically relates to a semi-floating-gate device which comprises at least a semiconductor substrate, a source region, a drain region, a floating gate, a control gate, a perpendicular channel region and a gated p-n junction diode used to connect the floating gate and the substrate. The semi-floating-gate device disclosed in the disclosure using the floating gate to store information and realizing charging or discharging of the floating gate through a gated p-n junction diode boasts small unit area, high chip density, low operating voltage in data storage and strong ability in data retain.

Semi-floating-gate device and its manufacturing method

A semiconductor memory with a U-shaped channel comprises: a U-shaped channel region arranged in a semiconductor substrate, a source region, a drain region, a first layer of insulation film arranged on the U-shaped channel region, a floating gate provided with a notch, a second layer of insulation film, a control gate, a p-n junction diode arranged between the floating gate and the drain region, and a gate controlled diode formed by the control gate, the second layer of insulation film, and the p-n junction diode and using the control gate as a gate. Under the precondition of not increasing the manufacturing cost and difficulty of the semiconductor memory with a U-shaped channel and not affecting the performance of the semiconductor memory with a U-shaped channel, the dimension of a semiconductor storage device is further reduced and the chip density is increased by arranging the notch in the floating gate.

Semiconductor memory with U-shaped channel

The present invention discloses a power Metal Oxide Semiconductor (MOS) transistor, wherein a second U-shaped trench is formed below a first U-shaped trench, so that a field oxidation stress transition region can be extended, so as to greatly reduce current leakage caused by the field oxidation stress and improve the reliability of the device; and a charge compensation region is provided in a drift region at the bottom of the second U-shaped trench, and a super-junction structure is formed between the charge compensation region and the drift region to improve the breakdown voltage of the power device. According to the present invention, the second U-shaped trench and the charge compensation region are formed by a self-aligning process, so that the technical process is simple, reliable and easy to control, and can reduce the manufacturing cost of the power MOS transistor and improve its yield.

Power MOS transistor and manufacturing method therefor

Growing community of inventors

Shanghai, China

Pengfei Wang