Fairchild Semiconductor Corporation

Semiconductor Components Industries, LLC

Bmc (tianjin) Medical Co., Ltd

Peng Zhu

WeiMing Sun

Lei Huang

Zhi Zhuang

Yongliang Li

Yajie Wang

Emma Wang

Mingzhao Zhou

Ming Chuen Alvan Lam

Jianing Zhou

Erliang Li

William Robert Newberry

Eric Wu

Kenneth O'Brien

Shuyuan Shao

Frame for respiratory mask

Cushion for respiratory mask

According to an aspect, an overvoltage protection circuit includes a bias current generator configured to generate a bias current, and a current comparator configured to receive the bias current and a voltage associated with a data terminal of a connector. The current comparator includes a transistor. The transistor is configured to activate based on a level of the voltage associated with the data terminal. The current comparator is configured to compare a current of the transistor with the bias current. The overvoltage protection circuit includes an output circuit configured to generate an overvoltage protection signal in response to the current of the transistor being greater than the bias current.

Overvoltage protection circuit for USB connector

This document discusses, among other things, apparatus and methods for restarting an electronic device configured to receive power from a main power supply and an auxiliary power supply. The electronic device includes a reset circuit a reset circuit configured to provide a first signal indicative of an electronic device failure, and an isolation circuit configured to isolate the main power supply from the auxiliary power supply in response to the first signal so that power is supplied to the reset circuit by the auxiliary power supply. The reset circuit can be configured to generate a reset signal for restarting the electronic device with the power supplied by the auxiliary power supply.

Apparatus and method for restarting an electronic device

This document discusses, among other things, an electro-static discharge (EDS) filtering circuit and method, a reset circuit, and an electronic device. The ESD filtering circuit comprises a first current dividing circuit and a second current dividing circuit which respectively share a current of a first power source signal and aggregate the shared currents to form a second power source signal upon filtering, wherein a voltage drop of the first current dividing circuit is constant and the second current dividing circuit is a pure resistor element circuit.

Electro-static discharge filtering circuit and method, reset circuit, and electronic device

This document discusses, among other things, an impedance detection circuit, method, and integrated circuit, comprising a ramp-up current generation circuit and an impedance determining circuit, wherein the ramp-up current generation circuit is configured to input a ramp-up current including n breaks to a port of a device where the ramp-up current generation circuit is disposed, to which port an external device is connected, and wherein the impedance determining circuit is configured to detect an impedance of the external device in each break time period of the ramp-up current input by the ramp-up current generation circuit until the impedance of the external device is acquired by detection in the last break time period of the n breaks.

Impedance detection circuit, method, and integrated circuit

A delay time adjusting circuit is described, in which a reference signal circuit generates at least one reference signal to an A/D conversion circuit, an input signal circuit generates an input signal to the A/D conversion circuit, the A/D conversion circuit compares the input signal with the at least one reference signal to output a digital signal to a digital logic chip, and the digital logic chip determines a delay time based on the digital signal. In this way, the delay time can be determined digitally, and an adjusting accuracy of the delay time can be increased; and also, the delay time can be adjusted through changing the level of the input signal, thus reducing circuit losses and costs.

Delay time adjusting circuit, method, and integrated circuit

This document discusses, among other things, a delay circuit, in which a first register is written with a delay reference code, a second register is written with a delay factor, a control unit determines a corresponding delay ratio in a storage unit based on the delay factor in the second register, and sends the determined delay ratio to a first digital timing unit, the first digital timing unit determines a delay reference time based on the delay reference code in the first register, multiplies the delay reference time by the delay ratio to result in a desired delay time, and generates a delay.

Delay method, circuit and integrated circuit

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Tianjin, China

Peng Zhu