Enkris Semiconductor, Inc.

Peng Xiang

Kai Cheng

Yu Zhu

The present application provides a method of manufacturing a semiconductor structure. The manufacturing method includes following steps: at step S1: forming a first epitaxial structure above a substrate, where the first epitaxial structure is doped with a doping element; at step S2: forming a sacrificial layer above the first epitaxial structure; at step S3: etching the sacrificial layer; at step S4: growing an insertion layer above the first epitaxial structure when the etching of the sacrificial layer is completed; and at step S5: growing a second epitaxial structure above the insertion layer; before proceeding to step S4, repeating step S2 and step S3, until a concentration of the doping element in the first epitaxial structure is lower than a predetermined threshold.

Semiconductor manufacturing method using sacrificial layer etching for doping concentration reduction

A semiconductor structure and a manufacturing method thereof are provided in the present disclosure. The semiconductor structure includes a semiconductor substrate; a plurality of stacked structures and a plurality of isolation structures on the semiconductor substrate, wherein the stacked structures are spaced apart each other, and each of the isolation structures are located between adjacent stacked structures; each of the stacked structures comprises a nucleation layer and a first epitaxial layer from bottom to top; and a heterojunction structure on the plurality of stacked structures, wherein the heterojunction structure is distributed over an entire surface, and an air gap is formed between the heterojunction structure and each of the isolation structures.

Semiconductor structure and manufacturing method thereof

Disclosed is a preparation method for a semiconductor structure. The semiconductor structure includes: a substrate; an epitaxial layer and an epitaxial structure that are stacked on the substrate in sequence. The epitaxial layer is doped with a doping element. In the forming process, a sacrificial layer is formed on the epitaxial layer, and the sacrificial layer is repeatedly etched, such that a concentration of the doping element in the epitaxial layer is lower than a preset value. In this application, the sacrificial layer is formed on the epitaxial layer, and the sacrificial layer is repeatedly etched, such that the concentration of the doping element in the epitaxial layer is lower than the preset value, so as to prevent the doping element in the epitaxial layer from being precipitated upward into an upper-layer structure, ensure the mobility of electrons in a channel layer, and improve the performance of a device.

Preparation method for semiconductor structure

Disclosed is a graphite plate to solve a problem of poor performance uniformity of an epitaxial wafer obtained during carrying on epitaxial growth of material using the graphite plate. A graphite plate includes: a graphite plate body, includes a carrying recess and a recess located on one side of the carrying recess away from a central point of the graphite plate body; and a stopper, which is embedded in the recess in a matching manner, and the stopper protrudes from the bottom surface of the carrying recess to form a limiting structure.

Graphite plate

A semiconductor structure includes a heterojunction, including at least two sets of channel layers and barrier layers stacked sequentially; a first p-type semiconductor, disposed in a gate region of the heterojunction and extended to a bottom of the heterojunction; and a second p-type semiconductor, disposed on the gate region of the heterojunction. By providing a heterojunction including at least two sets of channel layers and barrier layers stacked sequentially, multilayer 2DEG is realized by using multilayer channel layers and barrier layers to increase the concentration of 2DEG, thereby reducing the resistance. Since a first p-type semiconductor is disposed in a gate region of the heterojunction, the p-type semiconductor materials in the first p-type semiconductor are used to deplete the 2DEG to realize normally-off and increase the threshold voltage.

Heterostructure including alternating sets of channel and barrier layers

The present invention discloses a semiconductor structure and a method for manufacturing the semiconductor structure. The semiconductor structure includes: a substrate; and at least one composition adjusting layer disposed above the substrate; wherein each of the at least one composition adjusting layer is made of a semiconductor compound, the semiconductor compound at least comprises a first element and a second element, and an atomic number of the first element is less than an atomic number of the second element, wherein in each of the at least one composition adjusting layer, along an epitaxial direction of the substrate, an atomic percentage of the first element in a compound composition is gradually decreased at first and then gradually increased, a thickness of a gradual decrease section is greater than a thickness of a gradual increase section.

Semiconductor structure and method for manufacturing semiconductor structure

The invention provides a semiconductor structure and a method of preparing a semiconductor structure, which solves the problems of easy cracking, large warpage and large dislocation density which exist in epitaxial growth of a semiconductor compound epitaxial structure on a substrate in the prior art. The semiconductor structure includes: a substrate; at least one periodic structure disposed over the substrate; wherein each of the periodic structures includes at least one period, each period including a first periodic layer and a second periodic layer which are sequentially stacked in an epitaxial direction; wherein the thickness of the nth periodic structure is smaller than the thickness of the (n+1)th periodic structure, wherein n is an integer greater than or equal to 1.

Semiconductor structure and method of preparing semiconductor structure

The invention provides a semiconductor structure and a method of preparing a semiconductor structure, which solves the problems of easy cracking, large warpage and large dislocation density which exist in a semiconductor compound epitaxial structure epitaxially grown on a substrate in the prior art. The semiconductor structure includes: a substrate; at least one periodic structure disposed over the substrate; wherein each of the periodic structures includes at least one period, each period including a first periodic layer and a second periodic layer which are sequentially stacked in an epitaxial direction.

Growing community of inventors

Jiangsu, China

Peng Xiang