International Business Machines Corporation

Huawei Technologies Co., Limited

Avary Holding (shenzhen) Co., Limited.

Hongqisheng Precision Electronics (qinhuangdao) Co., Ltd.

Future Wei Technologies, Inc.

Globalfoundries Inc.

Peng Wu

Alexandre E Eichenberger

Kai-Ting Amy Wang

Peng Zhao

Haichuan Wang

Thomas M Gooding

Mark Edwin Giampapa

Michael K Gschwind

Jose Eduardo Moreira

Raul Esteban Silvera

Xiaotong Zhuang

Gheorghe Almasi

Jessica Tseng

Hiroshige Hayashizaki

Fang-Bo Xu

Jian-Quan Shen

Ke-Jian Wu

Valentina Salapura

Dong Chen

Paul William Coteus

Michael A Blocksome

Hiroshi Inoue

Alan G Gara

Joseph D Ratterman

Philip Heidelberger

Adam James Muff

Todd Edward Takken

Martin Ohmacht

Bruce Martin Fleischer

Robert William Wisniewski

John A Gunnels

Burkhard Steinmacher-Burow

Kathryn Mary O'Brien

Mark Gregory Megerian

Matthias Augustin Blumrich

Sameh W Asaad

Shawn Anthony Hall

Thomas Winters Fox

John Kevin O'Brien

Chen-Yong Cher

Barry Marshall Trager

Charles David Wait

Sameer Kumar

James Anthony Marcella

John Kevin Patrick O'Brien

Todd Alan Inglett

George L Chiu

Krishnan Sugavanam

Gerard Vincent Kopcsay

Jeffrey John Parker

Robert Matthew Senger

Noel A Eisley

Craig Brian Stunkel

Rudolf Adriaan Haring

David L Satterfield

Douglas R Miller

Yutaka Sugawara

Amith R Mamidala

Kristan D Davis

Jose R Brunheroto

Michael B Mundy

Matthew Roger Ellavsky

Robert E Walkup

Handong Ye

James Lee Van Oosten

Samuel J Miller

Ruth Janine Poole

Gabor J Dozsa

Brant L Knudson

Peter Boyle

Ralph E Bellofatto

Man Pok Ho

Norman Christ

Kahn C Evans

William Maupin Stockdell

Alfred Thomas Watson, Iii

Jose G Castanos

Brian E Smith

Mauricio J Serrano

Yaoqing Gao

Takuya Nakaike

John-David Wellman

Roch Georges Archambault

Long Chen

Ying Li

Rei Odaira

Mark Yamashita

Brice Adam Dobry

Amy K Wang

Amy (k T) Wang

Jianjun Qiu

Xuan Zhong

Amy Kai-Ting Wang

A circuit board with conductive wiring which is precisely shaped and sized includes a two-part conductive element, namely a first conductive wiring layer and a second conductive wiring layer, a first cover film and a second cover film. The first conductive wiring layer and the second conductive wiring layer are in direct contact to each other. A projection of the first conductive wiring layer and a projection of the second conductive wiring layer along a direction perpendicular to the circuit board overlap with each other. The first and the second cover films wrap the first and the second conductive wiring layers, respectively.

Circuit board

Embodiments of this disclosure allow non-position-independent-code to be shared between a closed application and a subsequent application without converting the non-position-independent-code into position-independent-code. In particular, embodiment techniques store live data of a closed application during runtime of the closed application, and thereafter page a portion of the live data that is common to both the closed application and a subsequent application back into volatile memory at the same virtual memory address in which the portion of live data was stored during runtime of the closed application so that the paged lived data may be re-used to execute the subsequent application in the managed runtime environment. Because the paged live data is stored at the same virtual memory address during the runtimes of both applications, non-position-independent-code can be shared between the applications.

Re-playable execution optimized for page sharing in a managed runtime environment

Systems and methods for auto-tuning and compiling source code are provided. A first executable file is generated by compiling the source code in accordance with a first optimization scheme. Compiling reports, performance reports, and bottleneck information are generated for the first executable file. A second optimization scheme is generated, and a second executable file is generated by compiling the source code in accordance with the second optimization scheme. An optimized executable file is output based on the first executable file and the second executable file.

Method and system of intelligent iterative compiler optimizations based on static and dynamic feedback

A printed circuit board with high-capacity and high-current copper circuit includes a conductive trace, a first protecting layer, and a second protecting layer on opposite sides of the conductive trace. The conductive trace includes a basic conductive trace pattern, a first conductive trace pattern, and a second conductive trace pattern. The first and second conductive trace patterns are directly formed on opposite surfaces of the basic copper conductive trace pattern. A width of trace of the first conductive trace pattern is the same as a line width of the second conductive trace pattern.

Printed circuit board with high-capacity copper circuit

There are provided a system, a method and a computer program product for selecting an active data stream (a lane) while running Single Program Multiple Data code on a Single Instruction Multiple Data machine. The machine runs an instruction stream over input data streams and machine increments lane depth counters of all active lanes upon the thread-PC reaching a branch operation and updates the lane-PC of each active lane according to targets of the branch operation. An instruction of the instruction stream includes a barrier indicating a convergence point for all lanes to join. In response to a lane reaching a barrier: evaluating whether all lane-PCs are set to a same thread-PC; and if the lane-PCs are not set to the same thread-PC, selecting an active lane from the plurality of lanes; otherwise, incrementing the lane-PCs of all the lanes, and then selecting an active lane from the plurality of lanes.

Optimize control-flow convergence on SIMD engine using divergence depth

System and method for managing migration of global variables on processing system during live program updates, including creating a shared data segment is created in a physical memory of the processing system, binding a logical address space of a first global variable data segment for a first version of a program to a physical address of the shared data segment, and binding a logical address space for a second global variable data segment for an update version of the program to the physical address of the shared data segment. The first global variable data segment and the second global variable data segment exist concurrently and each map to common global variables stored in the shared data segment.

Global variable migration via virtual memory overlay technique for multi-version asynchronous dynamic software update

A method and system for using multiple versions of a software component, includes storing, in memory, a first function table that points to executable code in the memory for functions from a first version of the software component, and storing, in the memory, a second function table that points to executable code in the memory for functions from a second version of the software component, referencing the first function table, when running a first application thread, to execute the functions from the first version of the software component; and referencing the second function table, when running a second application thread that is active concurrently with the first application thread, to execute the functions from the second version of the software component.

Multi-version asynchronous dynamic software update system and method for applications with multiple threads

There are provided a system, a method and a computer program product for selecting an active data stream (a lane) while running SPMD (Single Program Multiple Data) code on SIMD (Single Instruction Multiple Data) machine. The machine runs an instruction stream over input data streams. The machine increments lane depth counters of all active lanes upon the thread-PC reaching a branch operation. The machine updates the lane-PC of each active lane according to targets of the branch operation. The machine selects an active lane and activates only lanes whose lane-PCs match the thread-PC. The machine decrements the lane depth counters of the selected active lanes and updates the lane-PC of each active lane upon the instruction stream reaching a first instruction. The machine assigns the lane-PC of a lane with a largest lane depth counter value to the thread-PC and activates all lanes whose lane-PCs match the thread-PC.

A Multi-Petascale Highly Efficient Parallel Supercomputer of 100 petaflop-scale includes node architectures based upon System-On-a-Chip technology, where each processing node comprises a single Application Specific Integrated Circuit (ASIC). The ASIC nodes are interconnected by a five dimensional torus network that optimally maximize the throughput of packet communications between nodes and minimize latency. The network implements collective network and a global asynchronous network that provides global barrier and notification functions. Integrated in the node design include a list-based prefetcher. The memory system implements transaction memory, thread level speculation, and multiversioning cache that improves soft error rate at the same time and supports DMA functionality allowing for parallel processing message-passing.

Multi-petascale highly efficient parallel supercomputer

A printed circuit board with high-capacity copper circuit includes a conductive trace, a first protecting layer, and a second protecting layer formed on opposite sides of the conductive trace. The conductive trace includes a base conductive trace pattern, a first conductive trace pattern, and a second conductive trace pattern. The first and second conductive trace patterns are directly formed on opposite surfaces of the base copper conductive trace pattern. A trace width of the first conductive trace pattern is the same as a line width of the second conductive trace pattern.

Method for manufacturing a printed circuit board with high-capacity copper circuit

A computer-implemented method and system for reducing the amount of memory space required to store applications written in dynamic scripting languages loads a program module into memory and removes a category of program code, such as debug information or function definitions, from the program module. The method and system also receives a request for debug information, or a function call or query, and determines whether or not the corresponding program code is in memory. If not, then the location in storage is identified where the program module is stored, and another copy containing the corresponding program code is loaded into memory. The corresponding program code is located and copied into the program module in memory, and a response is provided to the request.

On-demand loading of dynamic scripting language code for reduced memory usage

Methods and systems that facilitate efficient and effective application program maintenance and patch distribution are described. A device comprises: a memory that stores application source code files and instructions for creating a hot patch file, wherein the application source code files include an update source code file and initial source code files before an application update; and a processor operable to create the hot patch file, wherein the hot patch file is created based upon differences between a pair of optimized source code file sets that result from optimization of a first set of the initial source code files and separate optimization of a second set of source code files; wherein the second set includes an update source code file and associated files selected from the first set based on results from a graph indicating manners in which said source code files related to one another.

Systems and methods to update source code files

Embodiments of the present invention provide a fault diagnosis method and apparatus. A service in the fault diagnosis method relates to at least one user, and the fault diagnosis method includes: determining whether a terminal of each user allows performing fault diagnosis for the service; and performing fault diagnosis for the service if the terminal of each user allows performing fault diagnosis for the service. In the embodiments of the present invention, fault diagnosis for the user related service cannot be performed unless allowed by a user terminal or allowed by both the user terminal and a system side. Thereby, it is ensured that fault diagnosis is performed in a secure environment, which better complies with security laws and regulations.

Fault diagnosis method and apparatus

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Mt. Kisco, NY, United States of America

Peng Wu