Intel Corporation

Altera Corporation

Microsoft Technology Licensing, LLC

Other

Wavecrest Corporation

Vmware, Inc.

Baidu USA LLC

Gigamax Technologies, Inc.

Nicira, Inc.

Peng T Li

Sanjeev N Trika

Jawad Basit Khan

Masashi Shimanouchi

Sergey Yuryevich Shumarayev

Weiqi Ding

Mingde Pan

Hsinho Wu

Martin Langhammer

Jan Brian Wilstrup

Yong Wang

Sergio Antonio Chan Arguedas

Steven J Fraasch

John David Hamre

Thungoc M Tran

Jon M Long

Myron Loewen

Haiyun Yang

William K Lui

Bamidele Daniel Falola

Norbert Paul Kusters

William J Bolosky

Boon Seong Ang

Anand S Ramalingam

Tao Wei

David J Pelster

Divya Vijayaraghavan

Guolin Yang

Deepak Goyal

Manish Dubey

Ken P Hackenberg

Donald W Alderrou

Mario R Garzia

Amitesh Saha

Daniel Tun Lai Chow

Dennis M Petrich

Yongmei Liu

Shenavia S Howell

Ross Adam Jessen

Randolph B Haagens

Vinodh Gopal

Wilson Wong

Chia-Pin Chiu

Sreeram Kumar Ravinoothala

Dexiang Wang

Wenyi Jiang

Zhimin Wan

William Anthony Harper

Shankar Devasenathipathy

Jie Shen

Tien Duc Pham

John J Beatty

Kelly P Lofgreen

Yanjing Ke

Yulong Zhang

Baskar Sridharan

Sriram Narayan

Sriram S Rao

Xiong Liu

Hemanth K Dhavaleswarapu

Karthick Krishnamoorthy

Steven John McCoy

Gamil A Cain

Raghunath Ramakrishnan

Sangeeta Raman

Sri Sai Kameswara Pavan Kumar Kasturi

Christopher William Douglas

Joel Martinez

Xinghua Hu

Mujtaba S Khambatti

Ryan J Norton

Virajith Jalaparti

Heidi A Crittenden

Divya Narayanan

Marco Aurelio Cartas

Marco Aurelio Cartas Ayala

Susmriti Das Mahapatra

Anna Dayen

Russell E Cook, Jr

Todor Ivanov Jivakov

Dinesh Padmanabhan Ramalekshmi Thanu

Luke J Garner

Shaista Malik

Ronak Doshi

Stephanie C Tjen-A-Looi

Lifang Xie

Liang-Wu Fu

Krishna Pradeep Reddy Tamma

Chakrapani Bhat Talapady

Yaohui Chen

Mingtian Ni

Jie Sun

Venkata Suresh Guthikonda

Yonghao An

Karthik Visvanathan

Siriram Narayan

Examples herein relate to a storage system that separately handles portions of a write operation that are aligned and misaligned with respect to retrievable segments from a storage device. For misaligned portions, a buffer can be used to store misaligned retrievable segments and update the segments with content provided with the write operation. Aligned portions of content associated with a write request can be written directly to the storage medium or overwrite corresponding retrievable segments present in the buffer. A table or array can track logical block addresses that correspond to content in the buffer or in the storage. Content in the buffer can be kept in the buffer without being backed-up or persisted to the storage until a triggering event occurs such as power loss or low space in the buffer.

Buffer to reduce write amplification of misaligned write operations

Embodiments include semiconductor packages and a method to form such packages. A semiconductor package includes first and second bottom dies on a package substrate. The semiconductor package includes first top dies on the first bottom die, second top dies on the second bottom die, and a pedestal on the first and second bottom dies. The pedestal comprises a high thermal conductive material and is positioned on a region of top surfaces of the first and second bottom dies. The semiconductor package includes an encapsulation layer over the first and second bottom dies, and surrounds the first and second top dies and the pedestal. The semiconductor package includes a TIM over the first and second top dies, pedestal, and encapsulation layer, and an integrated heat spreader (IHS) over the TIM. The pedestal is on a periphery region of the top surfaces of the first and second bottom dies.

STIM/liquid metal filled laser drill trench to improve cooling of stacked bottom die

Disclosed herein are lids for integrated circuit (IC) packages with solder thermal interface materials (STIMs), as well as related methods and devices. For example, in some embodiments, an IC package may include a STIM between a die of the IC package and a lid of the IC package. The lid of the IC package may include nickel, the IC package may include an intermetallic compound (IMC) between the STIM and the nickel, and the lid may include an intermediate material between the nickel and the IMC.

Lids for integrated circuit packages with solder thermal interface materials

Embodiments may relate to a microelectronic package that includes a lid coupled with a package substrate such that a die is positioned between the lid and the package substrate. The lid may include a heating element that is to heat an area between the lid and the die. Other embodiments may be described or claimed.

Integrated heat spreader (IHS) with heating element

The disclosure provides an approach for segmenting a user datagram protocol (UDP) packets. A method includes generating the UDP packet, containing UDP data, at a virtual computing instance (VCI) running on a host machine; sending the UDP packet from the VCI to a hypervisor running on the host machine; after sending the UDP packet to the hypervisor, segmenting the UDP packet into a plurality of UDP segments, wherein each of the plurality of UDP segments includes a portion of the UDP data and a UDP header; and transmitting the plurality of UDP segments, over a network, to a destination of the UDP packet.

User datagram protocol segmentation offload for virtual machines

Microelectronic assemblies, and related devices and methods, are disclosed herein. For example, in some embodiments, a microelectronic assembly may include a package substrate having a first surface and an opposing second surface; a die having a first surface and an opposing second surface, wherein the first surface of the die is coupled to the second surface of the package substrate; a cooling apparatus thermally coupled to the second surface of the die; and a thermal interface material (TIM) between the second surface of the die and the cooling apparatus, wherein the TIM includes an indium alloy having a liquidus temperature equal to or greater than about 245 degrees Celsius.

Microelectronic assemblies including a thermal interface material

Systems, methods, and devices are described for writing to a solid-state drive (SSD) that includes a non-volatile memory device, the volatile memory device includes first and second memory regions, the first memory region storing an address mapping table. A write request that includes a host logic block address (LBA) and data is received. A determination of whether the received LBA corresponds to the non-volatile memory device or the second memory region is made. In response to the received LBA corresponding to the non-volatile memory device, a physical address of the non-volatile memory device corresponding to the received LBA is determined based on the address mapping table and the included data is written to the determined physical address of the non-volatile memory device. In response to the received LBA corresponding to the second memory region, the included data is written to the second memory region based on the received LBA.

Hybrid solid-state drive

Disclosed herein are integrated circuit (IC) packages with asymmetric adhesion material regions, as well as related methods and devices. For example, in some embodiments, an IC package may include a solder thermal interface material (STIM) between a die of the IC package and a lid of the IC package. The lid of the IC package may include an adhesion material region, in contact with the STIM, that is asymmetric with respect to the die.

Integrated circuit packages with asymmetric adhesion material regions

A host-managed storage device includes an offload capability that enables the host to offload all or a portion of a defrag operation to the storage device. Rather than issuing read, write or copy operations and commands to relocate data to the host's DRAM, the host assembles a defrag operation command descriptor for the storage device controller. The command descriptor includes a defrag bitmap that can be directly accessed by the storage device controller to conduct the defrag operation entirely on the storage device at band granularity, without consuming host CPU cycles or host memory. The reduction in host operations/commands achieved by offloading defragmentation to the storage device is on the order of at least a thousand-fold reduction.

Offload defrag operation for host-managed storage

Semiconductor packages having a sealant bridge between an integrated heat spreader and a package substrate are described. In an embodiment, a semiconductor package includes a sealant bridge anchoring the integrated heat spreader to the package substrate at locations within an overhang gap laterally between a semiconductor die and a sidewall of the integrated heat spreader. The sealant bridge extends between a top wall of the integrated heat spreader and a die side component, such as a functional electronic component or a non-functional component, or a satellite chip on the package substrate. The sealant bridge modulates warpage or stress in thermal interface material joints to reduce thermal degradation of the semiconductor package.

Semiconductor package having sealant bridge

Disclosed herein are channeled lids for integrated circuit (IC) packages, as well as related methods and devices. For example, in some embodiments, an IC package may include a die between a lid and a package substrate. A bottom surface of the lid may include a channel that at least partially overlaps the die.

Channeled lids for integrated circuit packages

An embodiment of a semiconductor package apparatus may include technology to provide a first interface between a first storage device and a host device, and provide a second interface directly between the first storage device and a second storage device. Other embodiments are disclosed and claimed.

Storage system with interconnected solid state disks

In one embodiment, a storage device comprises non-volatile storage media; a controller to receive, from a host, an object definition command that identifies a first data object and a second data object and a transformation to apply to the first data object and the second data object to generate a first transformed object and store the first transformed object in the non-volatile storage media; and a transformation engine to apply the transformation to the first data object and the second data object.

Method and apparatus for performing multi-object transformations on a storage device

Systems and methods for electronic devices including two or more semiconductor devices coupled via an interconnect. The interconnect includes multiple lanes each having a link between the first and second semiconductor devices. One or more lanes of the multiple lanes each include clock and data recovery circuitry to perform full clock and data recovery. One or more other lanes of the multiple lanes each do not include clock and data recovery circuitry and instead includes a phase adjustment and clock multiplier circuit that is slave to clock and data recovery circuitry of the one or more lanes.

Short link efficient interconnect circuitry

A multichip package may include at least a package substrate, a main die mounted on the package substrate, a transceiver die mounted on the package substrate, and an optical engine die mounted on the package substrate. The main die may communicate with the transceiver die via a first high-bandwidth interconnect bridge embedded in the package substrate. The transceiver die may communicate with the optical engine die via a second high-bandwidth interconnect bridge embedded in the package substrate. The transceiver die has physical-layer circuits that directly drive the optical engine. An optical cable can be connected directly to the optical engine of the multichip package.

Integrated circuit package with electro-optical interconnect circuitry

Growing community of inventors

Lambertville, MI, United States of America

Peng T Li