Freescale Semiconductor,inc.

Peijun Wang

Robert S Jones, Iii

A redundant signed digit (RSD) analog to digital converter (ADC) includes an amplifier, a first variable capacitance circuit coupled to a first input to the amplifier, a second variable capacitance circuit coupled to a second input to the amplifier, a third variable capacitance circuit coupled to a first output of the amplifier, and a fourth variable capacitance circuit coupled to a second output of the amplifier. An output of the third and fourth capacitance circuits are coupled to one another and to inputs to the first and second variable capacitance circuits. Capacitance values of the first, second, third and fourth variable capacitance circuits are higher when inputs to the ADC correspond to a selected number of more significant bits than when inputs to the ADC correspond to a remaining number of less significant bits.

Redundant signed digit (RSD) analog to digital converter

A sigma delta modulator includes a first circuit that receives an analog signal and provides an intermediate signal and a first quantizer signal and further includes a first quantizer that receives the first quantizer signal and provides a first quantizer output. Also included are a second input circuit that receives the intermediate signal and provides a second quantizer signal and a second quantizer that receives the second quantizer signal and provides a second quantizer output. The first quantizer includes a programmable circuit having a first reference and a negative of the first reference, a first comparator having a first input coupled to the first quantizer signal, a second input coupled to the first reference and a second comparator having a second input coupled to the first quantizer signal a second input coupled to the negative. The first and second comparators have outputs that form the output of the first quantizer.

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Austin, TX, United States of America

Peijun Wang