No. 24 Research Institute of China Electronics Technology Group Corporation

China Electronics Technology Group Corporation No. 24 Research Institute

Peijian Zhang

Hequan Jiang

Ruzhang Li

Yonghui Yang

Kaizhou Tan

Tian Xiao

Jiahao Zhang

Sheng Qiu

Yuxin Wang

Yan Wang

Mingyuan Xu

Zhaohuan Tang

Yi Zhong

Liang Chen

Xiyi Liao

Xiaoquan Li

Ying Pei

Pengfei Wang

Guangbo Li

Xian Chen

Wei Cui

Peng Wang

Xiaojun Fu

Zhengyuan Zhang

Yonghong Dai

Feiyu Jiang

The disclosure provides a power semiconductor device and manufacturing method thereof. A plurality of second resistive field plate structures extending through an epitaxial layer in a first direction into a substrate are arranged in a termination region of the epitaxial layer and the plurality of second resistive field plate structures are arranged radially in a first plane. A plurality of tightly coupled second resistive field plates extending from a side close to a cell region to a side far away from the cell region form a more uniform three-dimensional electric field distribution diverging around the cell region, which optimizes a guiding and binding effect on a charge in a space depletion region of the cell region and improves a withstand voltage performance of the whole power semiconductor device.

Power semiconductor device and manufacturing method thereof

The MOS device with resistive field plate for realizing conductance modulation field effect in the present invention is based on the existing trench gate MOS device, and a semi-insulating resistive field plate electrically connected to the trench gate structure and the drain structure is added in the drift region, where the trench gate structure can control the on-off of the MOS channel, and the semi-insulating resistive field plate can adjust the doping concentration of the drift region to modulate the conductance of the on-state drift region and the distribution of off-state high-voltage blocking electric field, thus a lower on-resistance can be obtained. In addition, the modern 2.5-dimensional processing technology based on deep trench etching is adopted in the present invention, which is conducive to the miniaturization design and high density design of the structure and is more suitable for the More than Moore (beyond Moore) development of modern integrated semiconductor devices.

MOS device with resistive field plate for realizing conductance modulation field effect and preparation method thereof

A voltage control method and a voltage control circuit for an anti-fuse memory array, including: obtaining a storage data address, dividing the storage data address into multiple subdata addresses, decoding each subdata address to obtain a corresponding group of decoder output signals, converting the corresponding group of decoder output signals into a group of control signals by a corresponding group of high voltage converters; connecting multiple groups of data selectors in series, outputting selection voltages input to each group of data selectors to an anti-fuse unit under the control of the corresponding group of control signals; programming or reading an anti-fuse unit; the selection voltages include one of a programming selection voltage, a reading selection voltage, and a non-designated selection voltage. The present disclosure reduces the number of transistors and saves layout areas when the programming or reading operation is performed.

Voltage control method and voltage control circuit for anti-fuse memory array

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Chongqing, China

Peijian Zhang