National Chung Cheng University

Pei-Yao Chang

Jinn-Shyan Wang

A memory circuit properly workable under low working voltage includes a plurality of write word lines, a plurality of write bit lines, a plurality of read/write word lines, a plurality of read/write bit lines, a plurality of read/write inverted word lines, a plurality of virtual voltage source circuits, a plurality of virtual ground circuits, and a plurality of asymmetrical RAM cells constituting a cell array. The asymmetrical RAM cells are formed of seven transistors, five of which are NMOS transistors and two of which are PMOS transistors. The virtual voltage power source circuit and the virtual ground circuit can reinforce the write-in and read abilities under low working voltage to make the write-in and read actions more stable, decrease leakage current, and lower power consumption.

Growing community of inventors

Yunlin County, Taiwan

Pei-Yao Chang