Alcor Micro Corp.

Pei-Sung Chuang

Jean-Jen Cheng

Kuan-Chia Huang

The invention discloses an integrated circuit anti-interference outline structure for applications of integrated circuits capable of shielding the integrated circuit from invasions of external electromagnetic waves and leaks of internal electromagnetic waves, wherein the integrated circuit anti-interference outline structure surrounds a periphery of a partial circuit within the integrated circuit and comprises a plurality of PNP structures. At a surface of the integrated circuits are two metal strips for producing a parasitic capacitance at poly layers in order to control noises within acceptable ranges. On a P-substrate therein is disposed with a deep N-well layer for connecting to an N-terminal of an N-well layer, so as to produce a positive voltage zone having a large area, and thus having noise currents overflow from a ground terminal as well as preventing the integrated circuit from invasions and leaks of electromagnetic waves.

Integrated circuit anti-interference outline structure

A semiconductor anti-interference band distributed on peripheries of partial of regional circuits in an integrated circuit is assembled by an unequal number of PNP structures; two metal bands are disposed on the surface layer of the integrated circuit, wherein one band connects with GND and the other connects with Vcc; to add positive voltage at Vcc increases the charge at P&plus; tip thereby generating a parasitic capacitance on a poly layer between two P&plus; tips and limiting a noisy signal within the distributed area; furthermore, the P&plus; tip and an N well connect to produce a positive voltage zone in a large area to forcefully prevent a noisy signal current from passing through and make it discharge at a ground end with lower voltage so as to achieve the electromagnetic anti-interference function of the integrated circuit.

Semiconductor anti-interference band for integrated circuit

A device for processing output signals from a photo-diode uses a comparative conversion circuit to convert an analog output signal generated from a photo-diode to a square wave digital signal; wherein, a reference circuit obtains a reference signal by capturing the analog output signal from the photo-diode, feeds it back to a feedback logic unit for timing the high or low electric potential based on the reference signal; when the low electric potential time is too long, the entire electric potential and the wave crest value time of the output signal are adjusted to make the final output square wave digital signal of the comparative conversion circuit acquire a symmetric wave correction.

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Taipei Hsien, Taiwan

Pei-Sung Chuang