Microchip Technology Inc.

Silicon Storage Technology, Inc.

Trw Limited

Pei-Ming Daniel Chow

Mau-Chung Frank Chang

Bun Kobayashi

Steven Schell

Liyang Zhang

Yon-Lin Kok

Jing Zhu

Zhiwei A Xu

John Joseph Berenz

Paul S Lee

Jay S Pearlman

Wayne W Lam

Yonghan Chris Kim

M Frank Chang

A multi-gate Schottky depletion-mode field effect transistor (FET), at least one diode and two resistors comprise a compact electrostatic discharge (ESD) protection structure. This ESD protection structure can be laid out in a smaller area than typical multiple diode ESD devices. The multi-gate FET may comprise various types of high-electron-mobility transistor (HEMT) devices, e.g., (pseudomorphic) pHEMT, (metamorphic) mHEMT, induced HEMT. The multiple gates of the Schottky field effect device are used to form an ESD trigger and charge draining paths for protection of circuits following the ESD protection device. Both single and dual polarity ESD protection devices may be provided on an integrated circuit die for protection of input-output circuits thereof.

Compact electrostatic discharge (ESD) protection structure

A front-end module comprises a plurality of chips that includes first and second functional blocks and an interconnection circuit. The first functional block is formed using a first process type and includes a digital control circuit that generates a digital control signal in response to an external control signal from outside the front end module. The second functional block is formed using a second process type and includes a digitally controlled circuit controlled by the digital control signal generated by the first functional block. The second process type is different from the first process type. The interconnection circuit couples the digital control circuit and the digitally controlled circuit to provide the digital control signal to the digitally controlled circuit. In one aspect, the first functional block may be a low noise amplifier formed by a pseudomorphic high electron mobility transistor process. The second functional block may be a power amplifier formed by a heterojunction bipolar transistor process. In another aspect, the first functional block may be a power amplifier formed by a heterojunction bipolar transistor process. The second functional block may be a low noise amplifier formed by a pseudomorphic high electron mobility transistor process.

Digital control interface in heterogeneous multi-chip module

A step gain amplifier has an amplifier with an input and an output, and a bias circuit connected to the input and to a bias node. A passive feedback circuit using only passive elements connects the output to the input. A control circuit is connected to the bias circuit at the bias node.

Amplifier circuit with step gain

An attenuator system comprises an attenuator and a control circuit for controlling the attenuation of the attenuator. In one embodiment, the attenuator comprises two diodes or two diode connected transistors, and the control circuit comprises two transistors as the only active devices. In another embodiment, the control circuit comprises another transistor in a shut down circuit.

Attenuator with a control circuit

An amplifier circuit comprises a detection power input circuit for receiving an RF signal, and a bias circuit that includes an output for generating a bias signal in response to a reference control voltage. The power detector further comprises a detection circuit for generating a power control voltage having a voltage characteristic that offsets temperature characteristics of the received RF signal. The amplifier circuit further comprises a power amplifier coupled to the bias circuit. The power amplifier includes a driver stage providing the RF signal. The detection circuit compensates temperature variation of the inputted detection voltage of the received RF signal.

Integrated power detector with temperature compensation for fully-closed loop control

A system or method for a circuit network that receives an RF signal, and where a plurality of switching transistors receive an RF signal output by the circuit network and perform mixing with a local oscillation (LO) signal received on a LO input. An active bias circuit performs active bias of the plurality of switching transistors in a feedback loop provided between the LO input and an output of the plurality of switching transistors.

Adaptive-biased mixer

A focal plane imaging array (FPIA) (16) for use in a direct detection imaging device (10) for conducting radiometric imaging at microwave and millimeter-wave frequencies is disclosed as having an internal electronic calibration source (36). The plurality of energy detecting pixel elements (14) which comprise the FPIA (16) include a detection circuit (34) and a calibration circuit (36). The calibration circuit (36) is uni-directionally coupled to the detection circuit (34) to allow a known calibration signal 'pulse' to be introduced into the detection circuit (34). The calibration pulse is processed by the pixel detection circuit and the output signal is compared with the pixel's responsivity value. Adjustments in the pixel gain and sensitivity may then be made as appropriate.

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Los Angeles, CA, United States of America

Pei-Ming Daniel Chow