Apple Inc.

Pei-En Chang

Szu-Hsien Lee

Rungrot Kitsomboonloha

Shinya Ono

Kyung Wook Kim

Shih Chang Chang

Chin-Wei Lin

Victor H Yin

Hyunwoo Nho

Jie Won Ryu

Hao-Lin Chiu

Myungjoon Choi

Jason N Gomez

Hossein Nemati

Vehbi Calayir

Jung Yen Huang

Gihoon Choo

Saman Saeedi

Akira Matsudaira

Yu-Heng Cheng

Nikolaus Hammler

Donggeon Han

Suk Won Hong

Hongwoo Lee

Wei Hsin Yao

Chaohao Wang

Chun-Yao Huang

Kingsuk Brahma

Yuan Chen

Shengkui Gao

Hyunsoo Kim

Xiaokai Li

Jiun-Jye Chang

Kwang Soon Park

Sung Hwan Kim

Shatam Agarwal

Zino Lee

Chia Hsuan Tai

Alex H Pai

Yao Shi

Hassan Edrees

Amit Nayyar

Ce Zhang

Young-Jik Jo

Chuan-Jung Lin

Li-Xuan Chuo

Tae Woon Cha

Kaikai Guo

Hei Kam

Steven N Hanna

Hsin-Ying Chiu

Joyan Gratian Sanctis

Joyan G Sanctis

Pengyu Sun

Fan Zhou

A display may include an array of pixels that receive control signals from a chain of gate drivers. Each gate driver may include a number of semiconducting oxide transistors and capacitors. At least some of the semiconducting oxide transistors in the gate driver have bottom gate terminals configured to receive a separately adjustable bottom gate voltage for adjusting the threshold voltage during power on, normal, and power off operations. If desired, each gate driver may be provided with two or more different bottom gate voltages for individually controlling separate portions of the gate driver.

Display having semiconducting oxide gate driver circuitry with adjustable threshold voltage

An electronic device may have a display with touch sensors. One or more shielding layers may be interposed between the display and the touch sensors. The shielding layers may include shielding structures such as a conductive mesh structure and/or a transparent conductive film. The shielding structures may be actively driven or passively biased. In the active driving scheme, one or more inverting circuits may receive a noise signal from a cathode layer in the display and/or from the shielding structures, invert the received noise signal, and drive the inverted noise signal back onto the shielding structures to prevent any noise from the display from negatively impacting the performance of the touch sensors. In the passive biasing scheme, the shielding structures may be biased to a power supply voltage.

Shielding for electronic device displays with touch sensors

This disclosure provides various techniques for providing fine-grain digital and analog pixel compensation to account for voltage error across an electronic display. By employing a two-dimensional digital compensation and a local analog compensation, a fine-grain and robust pixel compensation scheme may be provided to the electronic display.

Two-dimensional content-adaptive compensation to mitigate display voltage drop

A display may include an array of pixels. Each pixel in the array includes an organic light-emitting diode coupled to associated thin-film transistors. The diode may be coupled to drive transistor circuitry, a data loading transistor, and emission transistors. The drive transistor circuitry may include at least two transistor portions connected in series. The data loading transistor has a drain region connected to a data line and a source region connected directly to the drive transistor circuitry. The data line may be connected to and overlap the drain region of the data loading transistor. The data line and the source region of the data loading transistor are non-overlapping to reduce row-to-row crosstalk.

Displays with reduced data line crosstalk

Embodiments presented herein relate to reducing visual artifacts on an electronic display caused by an intra-frame pause. To do so, the intra-frame pause may be divided into smaller intra-frame pause segments. The intra-frame pause segments may be applied to the display during different image frames and/or at different locations on the electronic display. For example, each intra-frame pause segment may be applied to a different location on the electronic display. In some embodiments, multiple intra-frame pause segments may be applied during a single image frame. In some embodiments, the intra-frame pause segments may be applied to various image frames and at various location on the electronic display according to a pattern. To reduce band flickering that may be caused by the different locations of the intra-frame pause segments, an emission duty of one or more rows of pixels of the display may be adjusted.

Mitigation of tearing from intra-frame pause

A display may include an array of pixels that receive control signals from a chain of gate drivers. Each gate driver may include a logic sub-circuit and an output buffer sub-circuit. The output buffer sub-circuit may include depletion mode semiconducting oxide transistors with high mobility. The logic sub-circuit may include semiconducting oxide transistors, some of which can be depletion mode transistors and some of which can be enhancement mode transistors with lower mobility. The logic sub-circuit may include at least a carry circuit, a voltage setting circuit, an inverting circuit, a discharge circuit.

Display with hybrid oxide gate driver circuitry having multiple low power supplies

An electronic device may include a display with pixels formed using light-emitting diodes, thin-film silicon transistors, thin-film semiconducting-oxide transistors, and capacitors. The silicon transistors, semiconducting-transistors, and capacitors may have control terminals that are coupled to gate or routing lines that extend across the face of the display and that are formed in a low resistance source-drain metal routing layer. Forming routing/gate lines using the low resistance source-drain metal routing layer dramatically reduces the resistance of the gate lines, which enables better timing margins for large display panels operating at higher refresh rates.

Large panel displays with reduced routing line resistance

An electronic device may have a housing and a display in the housing. The display may have one or more curved edges such as curved edges associated with rounded corners in the display and housing. The display may have an array of pixels. The display may include full-strength pixels and may have a band of antialiasing pixels having selectively reduced strengths to visually smooth content displayed along the curved edges. The pixels may be organic light-emitting diode pixels, liquid crystal display pixels, or other display pixels. Organic light-emitting diode pixels may have drive transistors and associated organic light-emitting diodes. Selectively elevated series or opaque light blocking structures of selectively reduced areas may be used to selectively reduce the strength of the antialiasing pixels. Liquid crystal display pixels may include electrodes of different shapes and/or opaque layer openings of different sizes to form antialiasing pixels in desired patterns.

Pixel array antialiasing to accommodate curved display edges

A display may have an array of pixels. Rows of pixels may receive gate line signals over gate lines. Display driver circuitry may have an adjustable clock generator that generates a series of clock pulses with different respective fall times to help equalize kickback voltages in the pixels of different rows. Within each row, gate lines may be provided with multiple parallel lines shorted at a series of tap points to help equalize kickback voltages across the pixels of different columns. A clock path may be formed between the clock generator and gate driver circuits. The clock path may run along an edge of the array of pixels. To help equalize kickback voltages in the pixels of different rows, the clock path may have first and second parallel metal lines that are selectively shorted to each other at a series of tap point locations along the clock path.

Clock and signal distribution circuitry for displays

An electronic device may have a housing and a display in the housing. The display may have one or more curved edges such as curved edges associated with rounded corners in the display and housing. The display may have an array of pixels. The display may include full-strength pixels and may have a band of antialiasing pixels having selectively reduced strengths to visually smooth content displayed along the curved edges. The antialiasing pixels may include single-opening pixels that each have a single opaque masking layer opening and may include dual-opening pixels that each include a pair of opaque masking layer openings. The single-opening pixels may be stronger than the dual-opening pixels.

Growing community of inventors

Campbell, CA, United States of America

Pei-En Chang