Intel Corporation

University System of Maryland

Pedro Quintero

Oleg Golonzka

Christopher J Wiegand

Justin Brockman

Angeline Smith

Tofizur Rahman

Daniel Ouellette

Juan G Alzate-Vinasco

Albert Chen

Andrew Smith

Nathan Strutt

Elijah V Karpov

Christopher J Jezewski

Conor P Puls

Stephen Wu

F Mccluskey

A memory apparatus includes an interconnect in a first dielectric above a substrate and a structure above the interconnect, where the structure includes a diffusion barrier material and covers the interconnect. The memory apparatus further includes a resistive random-access memory (RRAM) device coupled to the interconnect. The RRAM device includes a first electrode on a portion of the structure, a stoichiometric layer having a metal and oxygen on the first electrode, a non-stoichiometric layer including the metal and oxygen on the stoichiometric layer. A second electrode including a barrier material is on the non-stoichiometric layer. In some embodiments, the RRAM device further includes a third electrode on the second electrode. To prevent uncontrolled oxidation during a fabrication process a spacer may be directly adjacent to the RRAM device, where the spacer includes a second dielectric.

Resistive random-access memory devices and methods of fabrication

A memory device includes a perpendicular magnetic tunnel junction (pMTJ) stack, between a bottom electrode and a top electrode. In an embodiment, the pMTJ includes a fixed magnet, a tunnel barrier above the fixed magnet and a free magnet structure on the tunnel barrier. The free magnet structure includes a first free magnet on the tunnel barrier and a second free magnet above the first free magnet, wherein at least a portion of the free magnet proximal to an interface with the free magnet includes a transition metal. The free magnet structure having a transition metal between the first and the second free magnets advantageously improves the switching efficiency of the MTJ, while maintaining a thermal stability of at least 50 kT.

Magnetic memory devices with a transition metal dopant at an interface of free magnetic layers and methods of fabrication

An RRAM device is disclosed. The RRAM device includes a bottom electrode, a high-k material on the bottom electrode, a top electrode, a top contact on the top electrode and an encapsulating layer of AlO. The encapsulating layer encapsulates the bottom electrode, the high-k material, the top electrode and the top contact.

Retention improvement by high-k encapsulation of RRAM devices

A memory device method of fabrication that includes a first electrode having a first conductive layer including titanium and nitrogen and a second conductive layer on the first conductive layer that includes tantalum and nitrogen. The memory device further includes a magnetic tunnel junction (MTJ) on the first electrode. In some embodiments, at least a portion of the first conductive layer proximal to an interface with the second conductive layer includes oxygen.

Magnetic memory devices with layered electrodes and methods of fabrication

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Beaverton, OR, United States of America

Pedro Quintero