Motorola Corporation

Freescale Semiconductor,inc.

Motorola Solutions, Inc.

Pawitter Jit Mangat

James R Wasson

William J Dauksher

Sang-In Han

Scott Daniel Hector

Timothy J Collins

Kenneth H Smith

Young S Lee

Matthew A Thompson

Philip Armin Seese

Joe Mogab

Roy Allen Huston

Incoming audio from mobile devices can be centrally processed, where a server can filter background noise in real time, such as by using an XOR function. Instead of discarding the filtered noise, however, it can be processed in parallel to dynamically construct an acoustic map of the environment. The acoustic map can be generated from an aggregation of sound data from multiple devices positioned in a geographic environment. The acoustic map can be linked to a configurable set of rules, conditions, and events, which can cause dynamic adjustments to be made to a workforce task management system. For example, employee availability can be assessed using the acoustic map and workforce tasks can be assigned based in part upon this availability.

Task management in a workforce environment using an acoustic map constructed from aggregated audio

A patterned reflective semiconductor mask uses a multiple layer ARC overlying an absorber stack that overlies a reflective substrate. The absorber stack has more than one layer and an upper layer of the absorber stack has a predetermined metal. The multiple layer ARC overlying the upper layer of the absorber stack has layers of nitrogen, oxygen and nitrogen combined with the predetermined metal of the upper layer of the absorber stack. The oxygen layer in the ARC has less metallic properties than the nitrogen layers therein. In one form, an overlying dielectric layer is positioned on the multiple layer ARC to increase light interference. The ARC provides wide bandwidth inspection contrast for extreme ultra-violet (EUV) reticles.

Method of patterning photoresist on a wafer using a reflective mask with a multi-layer ARC

A patterned reflective semiconductor mask () uses a multiple layer ARC () overlying an absorber stack () that overlies a reflective substrate (). The absorber stack has more than one layer and an upper layer of the absorber stack has a predetermined metal. The multiple layer ARC overlying the upper layer of the absorber stack has layers of nitrogen, oxygen and nitrogen combined with the predetermined metal of the upper layer of the absorber stack. The oxygen layer in the ARC has less metallic properties than the nitrogen layers therein. In one form, an overlying dielectric layer () is positioned on the multiple layer ARC to increase light interference. The ARC provides wide bandwidth inspection contrast for extreme ultra-violet (EUV) reticles.

Methods and apparatus are provided for extreme ultraviolet phase shift masks. The apparatus comprises a substrate, a reflectance region, and an attenuating phase shifter. The reflectance region overlies the substrate. The attenuating phase shifter overlies the reflectance region. The attenuating phase shifter includes a plurality of openings that expose portions of the reflectance region. The attenuating phase shifter attenuates radiation through a combination of absorption and destructive interference. The method comprises projecting radiation having a wavelength less than 40 nanometers towards a mask having a plurality of openings through an attenuating phase shifter. The plurality of openings expose a reflectance region in the mask. The attenuating phase shifter is less than 700 angstroms thick. Radiation impinging on the reflectance region exposed by said plurality of openings is reflected whereas radiation impinging on the attenuating phase shifter is attenuated and shifted in phase. The attenuating phase shifter attenuates using absorption and destructive interference.

Attenuated phase shift mask for extreme ultraviolet lithography and method therefore

A photoresist layer on a semiconductor wafer is patterned using a mask with an absorbing layer that has been repaired by using an additional light-absorbing carbon layer that collects ions that are used in the repair process. After the repair has been completed, the ions that are present in the carbon layer are removed by removing the portion of the carbon layer that is not covered by the absorbing layer. Thus, the absorbing layer, which contains the pattern that is to be exposed on the photoresist layer, also acts as a mask in the removal of the portion of the carbon layer that contains the ions. Thereby the ions that are opaque at the particular wavelength being used are removed from the areas where light is intended to pass through the mask to the photoresist. The buffer layer is made absorbing to avoid problems with reflections at interfaces thereof.

Method of patterning photoresist on a wafer using a transmission mask with a carbon layer

An attenuated phase shift mask (or) includes a substrate (or) and an attenuation stack (or) overlying the substrate. The attenuation stack includes a chromium layer or ruthenium layer (or) overlying the substrate, a tantalum silicon oxide layer (or) overlying the chromium layer or the ruthenium layer, and a tantalum silicon nitride layer (or) overlying the tantalum silicon oxide layer. The attenuation stack may also include a layer () between the substrate () and the chromium or ruthenium layer (). In one embodiment, this layer is a portion of the substrate. The attenuation stack is used to pattern photoresist () on a semiconductor wafer. In one embodiment, portions of the substrate adjacent the attenuation stack has a transmission of greater than 90 percent and the attenuation stack has a transmission of 5 to 20 percent at the exposure wavelength. In one embodiment, an inspection contrast between the substrate and the attenuation stack at an inspection wavelength is greater than 75 percent.

Method of patterning photoresist on a wafer using an attenuated phase shift mask

A stencil mask ( or ) has both a thin membrane layer ( ) and a stress controlled layer ( ) for enabling electron and ion projection lithography at very small geometries. The thin membrane layer ( ) is within a range of substantially forty to two hundred nanometers and is preferably silicon nitride, and the stress controlled layer is preferably a metal or a metal alloy. Annealing of the stress controlled layer ( ) may be performed to obtain a desired stress characteristic. Semiconductors are made using the mask by projecting radiation through the thin membrane stencil mask and reduction optics ( ) onto resist ( ) formed on a plurality of die, the radiation forming a contrast image on the resist that is subsequently developed. Commercially available lithography equipment is compatible with the thin stencil mask.

Method for fabricating a thin-membrane stencil mask and method for making a semiconductor device using the same

A desired pattern is formed in a photoresist layer that overlies a semiconductor wafer using a reflective mask. This mask is formed by consecutively depositing a reflective layer, an absorber layer and an anti-reflective (ARC) layer. The ARC layer is patterned according to the desired pattern. The ARC layer is inspected to find areas in which the desired pattern is not achieved. The ARC layer is then repaired to achieve the desired pattern with the absorber layer protecting the reflective layer. The desired pattern is transferred to the absorber layer to reveal the reflective portion of mask. Radiation is reflected off the reflective mask to the semiconductor wafer to expose the photoresist layer overlying the semiconductor wafer with the desired pattern.

Method of making an integrated circuit using a reflective mask

A desirable pattern is formed in a photoresist layer that overlies a semiconductor wafer using an attenuating phase shift reflective mask. This mask is formed by consecutively depositing an attenuating phase shift layer, a buffer layer and a repairable layer. The repairable layer is patterned according to the desirable pattern. The repairable layer is inspected to find areas in which the desirable pattern is not achieved. The repairable layer is then repaired to achieve the desirable pattern with the buffer layer protecting the attenuating phase shift layer. The desirable pattern is transferred to the buffer layer and then transferred to the attenuating phase shift layer to achieve the attenuating phase shift reflective mask. Radiation is reflected off the attenuating phase shift reflective mask to the photoresist layer to expose it with the desirable pattern.

Method of forming a pattern on a semiconductor wafer using an attenuated phase shifting reflective mask

A method and apparatus for determining stress levels of membrane masks that may be used in membrane-based lithographic techniques is presented. A piezoelectric plate ( ) is used to induce vibrations into the membrane mask ( ), where the frequency and amplitude of the vibrations induced in the membrane layer ( ) are optically sensed. By comparing the stimulus applied to the piezoelectric plate ( ) with the response sensed optically in a gain phase analyzer ( ), a frequency graph ( ) associated with the membrane layer ( ) is constructed such that resonant frequencies are easily determined. These resonant frequencies can then be used to calculate the stress associated with the membrane layer ( ).

Membrane mask stress measurement apparatus and method therefor

A method for fabricating a patterning mask is disclosed in which a membrane layer is deposited on a first surface of a substrate. Patterned and unpatterned portions of the substrate are then defined on a second surface of the substrate. A majority of the thickness of substrate in the unpatterned portions is then dry etched to partially define a strut having sidewalls that are substantially perpendicular to the first surface. Wet etching is then performed to etch through the remaining thickness of the substrate to expose the bottom surface of the membrane layer and completely define the strut. Scattering elements may then be formed over the membrane layer. In one embodiment, the substrate is silicon and has a ( ) orientation and an edge of the silicon struts is aligned to a &lcub; &rcub; plane. In another embodiment, an edge of the silicon struts is aligned to a &lcub; &rcub; plane.

Mask, its method of formation, and a semiconductor device made thereby

A method for patterning a semiconductor device using a lithographic mask (300) having a membrane layer (204) overlying an opening in a substrate. The membrane layer supports a scattering layer (208), and has a varying content of silicon through a thickness thereof, that is, along the direction that is normal to the substrate. In one embodiment, the content of silicon increases along the normal direction, outward from the substrate. The mask has improved durability and reduces occurrences of pinhole defects in the membrane layer.

Method of forming a semiconductor device utilizing lithographic mask and

A etcher (10) has an inner chamber (22) that is in communication with a collection chamber (17). A cover (33) is made from a substrate (11) and an outer housing (34). The cover (33) is attached to the etcher (10) so that the substrate (11) is suspended over the inner chamber (22). A recirculating system (29) is used to pass an etchant through a filter, into the inner chamber (22), across the substrate (11), into the collection chamber (17), and into a reservoir.

Etching apparatus and method of etching a substrate

A substrate (10) having a central region (32) and a peripheral region (34) is processed using a chuck (40) that contacts peripheral regions (34) of the substrate but not the central region. A fabrication step is performed while the substrate (10) is on the chuck (40, 60, 70). The chuck can be used in the formation of a lithographic mask or a semiconductor device.

Method of processing a substrate utilizing specific chuck

A mask (300) for scattering angular limited projection electron beam lithography, including a substrate (102) having an opening (103) extending into the substrate, a membrane layer (204) extending over the substrate, the membrane layer including a window portion (209) that overlies an opening in the substrate and being formed of a material having a first electron scattering power, a patterned scattering layer overlying the membrane layer, at least along the window portion of the membrane layer, the patterned scattering layer being formed of a material having a second electron scattering power that is greater than the first electron scattering power, and an encapsulating layer (210) overlying the patterned scattering layer, the encapsulating layer having a third electron scattering power that is less than the second electron scattering power.

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Chandler, AZ, United States of America

Pawitter Jit Mangat