Freescale Semiconductor,inc.

Pawan K Tiwari

Sanjay Kumar Wadhwa

Deeya Muhury

A digital clock frequency multiplier () for increasing an input frequency of an input clock signal includes a generator () that receives the input clock signal and a high frequency digital signal. The generator () divides a count (N) of a number of cycles of the high frequency digital signal in one period of the input clock signal by a predetermined multiplication factor (MF) for generating an output clock signal. The output clock signal has a predetermined output frequency.

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Noida, India

Pawan K Tiwari