U.S. Philips Corporation

Paulus J Hovens

Wouter Smeulers

Willem Hendrik Amsen

Miloslav Tryzna

A picture display device including a generator circuit for generating a periodical waveform for addressing picture elements on a picture display screen, this generator circuit including a time-determining network with a capacitor. To reduce the influence of tolerances, the picture display device is provided with a compensation circuit including a second generator for generating a second periodical waveform and a source for applying a compensation current to the first-mentioned capacitor in dependence upon the second waveform, the second waveform generator including a time-determining network with a second capacitor and both capacitors being integrated in one semiconductor body.

Picture display device including a waveform generator/and a compensation

A coincidence circuit in a line synchronizing circuit arrangement for a picture display device. The coincidence circuit detects a coincidence state of an incoming line synchronizing signal which originates from a synchronizing signal separator, and a locally generated line signal which originates from a line oscillator. The coincidence circuit comprises a first coincidence detector which is operative during the field blanking interval and which comprises a source activated by the incoming line synchronizing signal for modifying the quantity of information which is stored in storage means. The line synchronizing signal is effectively inhibited in the coincidence state of the coincidence detector and is uninhibited in the non-coincidence state by the locally generated line signal. A second coincidence detector is operative during the field trace time and comprises a third source activated by the incoming line synchronizing signal for modifying the quantity of information which is stored in the storage means. The third source is enabled by the locally generated line signal in the coincidence state of the second coincidence detector, but is not enabled in the non-coincidence state.

Coincidence circuit in a line synchronizing circuit arrangement

A synchronizing circuit arrangement including an oscillator and a low-pass filter with a large time constant can be integrated in an integrated circuit, which filter has at least a switch arranged in series with a capacitor, because the switch is controlled by a periodical pulsatory control signal, which is derived from the oscillator signal, for a period of conductance which is many times shorter, at least a hundred times, than a period of the control signal. A hold circuit for holding and transferring the signal present across the filter during the period of conductance of the switch is connected to a proportional part of the filter, which hold circuit includes a second switch which is synchronous with the first switch.

Circuit arrangement for synchronizing an oscillator

A synchronizing circuit and a sawtooth generator for the field deflection in a picture display device in which the sawtooth-shaped signal generated by the sawtooth generator has a retrace whose duration is switchable between a short and a longer duration. In a first use this switchover is used for eliminating the interlacing upon reception of interlaced signals, while the difference between the two durations is equal to half a line period and the switchover is effected at the picture frequency. In a second use a memory circuit is used which is an auxiliary circuit for the field synchronization, in which the shorter duration of the retrace period is switched over to in the absence of a plurality of successive incoming field synchronizing pulses, which plurality is not higher than a predetermined value.

Synchronizing circuit and sawtooth generator for the field deflection in

In a television receiver comprising an automatic gain control circuit which receives an output signal from a synchronous detector and from an asynchronous detector, the asynchronous detector is decoupled from the automatic gain control circuit in the normal receiving mode by a switching signal obtained from a receiving mode detector.

Television receiver comprising a video signal detector of a type which

Matrix circuit for obtaining a third color difference signal from first and second color difference signals demodulated in a color television receiver, a level compensation circuit rendering the levels of the three color difference signals independent from one another without the use of control loops and by using only two level detection circuits.

Matrix circuits

In a class-B output amplifier having an npn-transistor the collector of which controls a cathode of a picture display tube via oppositely conducting parts of a diode and an emitter follower, respectively, a signal corresponding with the beam current through the relevant cathode is obtained from the collector circuit of an npn-transistor whose base-emitter path is arranged in parallel with the diode. The signal corresponding with the beam current can be used for controlling a background current and for limiting a beam current, respectively.

Television picture display device

In a television picture display device wherein a cathode of a picture display tube is driven by an emitter-follower and a control signal for a beam current reference level control circuit is obtained from the collector circuit of this emitter-follower, measures are taken to compensate for leakage currents from and to the cathode. To this end a blacker-than-black current compensation circuit is provided while furthermore it is ensured that the blacker-than-black curent can be processed by the beam current reference level control circuit.

CRT Beam current control apparatus

Switching the time constant of a filter in the APC-loop of a color television receiver is done by a keyed transistor switch so that the circuit is suitable to be formed as an integrated circuit.

Color television receiver including a chrominance subcarrier regenerator

A circuit arrangement in a picture display apparatus including an integrator having a time constant which is of the same order as one field period and which integrates the control voltage generated by the line phase discriminator. The voltage thus integrated is applied by means of a switch to the output terminal of the discriminator during each field blanking period. As a result both the flickering effect and the shift which may occur at the upper edge of the screen of the picture display tube as a result of the broad field synchronizing pulses and the equalizing pulses disappear. The circuit arrangement also includes a circuit which separates the discriminator from the integrator and which may be constituted as a long-tailed pair arrangement.

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Eindhoven, Netherlands

Paulus J Hovens