U.S. Philips Corporation

Paulus A Van Der Plas

Reinier De Werdt

Hubertus J Den Blanken

Paulus M Van Attekum

Herbert Lifka

Andreas Hubertus Montree

Robertus D Verhaar

Andre Stolmeijer

Nicole A Wils

Wilhelmina C Snels

A method of manufacturing a semiconductor device is set forth, comprising a silicon body (1) having a surface (4) where there are situated a number of semiconductor regions (5, 6) and field oxide regions (7). The semiconductor regions is formed, after the field oxide regions have been provided, by implantations of n-type and p-type dopants. In accordance with the invention the implantations with the n-type dopant (10, 11, 14), which are performed using an implantation mask (8) provided on the surface and comprising openings (9) at the area of a part of the semiconductor regions (5) to be formed, are combined with the implantations with the p-type dopant (12, 13, 15) which are carried out without using the implantation mask. Thus, the semiconductor regions (5, 6) are realised by means of a single implantation mask (8).

Method of manufacturing a semiconductor device comprising a silicon body

A method of manufacturing mask alignment marks on an active surface of a semiconductor substrate (12) is disclosed, in which first, at least one layer (13) of a material resistant to oxidation is formed on the active surface, after which by a local etching of this layer, zones (15') for isolation by a field oxide, are defined simultaneously with the alignment marks (17'). There are formed, after the local etching of the layer (13) of anti-oxidation material while using the remaining parts of the anti-oxidation layer as a mask, depressions (26) at the substrate surface of a given depth at least at locations containing the alignment marks, which locations are designated as alignment windows (18) and the surface of the substrate is then exposed within the windows, and finally a thermal oxidation step is effected to obtain the field oxide (19'), during which the alignment marks (18) are simultaneously covered by oxide (24).

Method of providing mask alignment marks

A method of manufacturing a semiconductor device includes forming field oxide regions (17) in a surface (1) of a silicon body (2) through oxidation, which body is provided with an oxidation mask (15) formed in a layered structure provided on the surface with a lower layer (4) of silicon oxide, an intermediate layer (5) of polycrystalline silicon and an upper layer (6) of a material including silicon nitride in which windows (8) are etched into the upper layer. The intermediate layer is etched away inside the windows and below an edge (10) of the windows, a cavity (11) is formed below the edge, and a material including silicon nitride is provided in the cavity. The material including silicon nitride is provided in the cavity while the surface of the silicon body situated inside the windows is still covered by a layer of silicon oxide, preferably with the lower layer of the layered structure. Field oxide regions can be provided in this way having the same dimensions as the photoresist mask (7) used for etching the window into the upper layer, while in addition a gate oxide (22) free from defects can be provided on the active regions (21) of the silicon body situated between the field oxide regions.

Method of manufacturing a semiconductor device having field oxide

A method of manufacturing a semiconductor device, in which a depression (1,2,3) in a surface (4) of a semiconductor substrate (5) is filled by covering it with a preplanarized filling layer (8,19,22) and a further planarization layer (9), after which the substrate (5) is brought into contact with an etchant, in which both layers (8,19,22) and (9) are etched at substantially the same rate. According to the invention, the preplanarized filling layer (8,19,22) is formed by covering the surface (4) with a layer of filling material (6) and then removing it beside the depression (1,2,3) over part of its thickness. Thus, the depression (1,2,3) is filled homogeneously in a comparatively simple manner with material of the filling layer (6).

Method of manufacturing a semiconductor device having a planarized

A method of manufacturing a semiconductor device, in which on a surface (1) of a silicon wafer (2) an oxidation mask (3) is locally provided, whereupon the wafer is subjected to an oxidation treatment, in which a layer of field oxide (8) is formed. In order to compensate for thickness losses during further processing steps, a layer of field oxide (8) has to be formed having a thickness exceeding a desired isolation thickness. This initial thickness is realized according to the invention in such a manner that a layer is formed having a thickness which is larger than the initial thickness, whereupon in a plasma with reactive ions this layer is etched back to the desired initial thickness. In the layer thus formed, having the desired initial thickness, the layer of field oxide is prevented from locally being etched in an etching solution (such as the hydrofluoride solution) at a higher rate during further processing steps.

Method of manufacturing a semiconductor device in which a silicon wafer

A method of manufacturing a semiconductor device, in which a surface (1) of a silicon wafer (2) is locally provided with an oxidation mask (3), whereupon the wafer is subjected to an oxidation treatment by heating it in an oxidizing gas mixture. According to the invention, the wafer is heated during the treatment in the oxidizing gas mixture to a temperature of 950.degree. to 1050.degree. C. Water is then added to the oxidizing gas mixture. The quantity of added water is initially less than 30% by volume and later larger. Thus, in a comparatively short time a comparatively thick layer of oxide can be formed without defects being formed in silicon lying under the oxide.

Method of manufacturing a semiconductor device, in which a silicon wafer

A method is provided in which an implantation treatment is carried out at a high energy of implantation in a semiconductor body (1) provided with a pattern of field insulation (6a) and in which the semiconductor body is provided with a masking, comprising a comparatively thin layer (8), a second comparatively thick layer (9) of a semi-masking material and a third comparatively thin layer (10). The second layer (9) is provided with openings (12) and the first layer (8) covers at least those parts of the surface which correspond to these openings (12). The third layer (10) has openings (22) each corresponding to one of the openings (12). The material of the first layer (8) differs from that of the second layer (9) and the material of the second layer (9) differs from that of the third layer (10). Preferably, simultaneously with the second layer (9) on the front side a semiconductor layer (19) is provided on the back side (3 ) of the semiconductor body (1).

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Eindhoven, Netherlands

Paulus A Van Der Plas