Sun Microsystems, Inc.

Paula C Kiser

Gavin G Gibson

Christian Cadieux

Gavin James Kirton

Michael K Hosrom

Mark J Hornacek

William F Day

Todd H McKenney

David A Hill

Susan L Copeland

Provided are a method, system and article of manufacture for fault determination. A duration of time is determined for receiving an event. A plurality of events are received in a time period that is at least twice the determined duration. A plurality of factors are determined corresponding to the plurality of events. At least one factor is determined from the plurality of factors, wherein the at least one factor is a cause of at least one of the plurality of events.

Method, system, and article of manufacture for fault determination

A digital data processing system comprises at least one subsystem comprising a plurality of resources, such as a storage subsystem comprising a plurality of drive modules, and a host processor. The host processor is connected to the drive modules through an interconnection which has a topology in the form of a loop. The interconnection has at least one configuration switch that is selectively configurable to a pass-through mode, in which the topology comprises the entire loop, or a bypass mode, in which the topology comprises a portion of the loop including the host processor and, possibly, at least one of the drive modules in the storage subsystem. The host processor can selectively condition the configuration switch into the pass-through mode or said bypass mode to connect more or fewer drive modules into the loop. Each of the disk modules further includes a disk module and a port by-pass switch, the port by-pass switch also being selectively configurable to a pass-through mode, in which the topology of the interconnection includes the disk module, and a bypass mode, in which the topology of the interconnection bypasses the disk module. The host processor can selectively condition the port bypass switches of the disk modules to connect more or fewer disk modules into the loop. The configuration switch and the port by-pass switches are directly controlled by a subsystem controller, which receives commands for controlling the switches from the host processor over a separate command interconnection.

Digital data processing system having a data bus and a control bus

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Paula C Kiser