Hrl Laboratories, LLC

Promtek

Raytheon Corporation

Paul Yang

William M Clark, Jr

Lap-Wai Chow

Gavin J Harbison

James Peter Baukus

Lower body garment

A technique for and structures for camouflaging an integrated circuit structure. The technique including forming active areas of a first conductivity type and LDD regions of a second conductivity type resulting in a transistor that is always non-operational when standard voltages are applied to the device.

Symmetric non-intrusive and covert technique to render a transistor permanently non-operable

A multilayered integrated circuit and a method of designing a multilayered integrated circuit are provided. The circuit comprises at least two conductive layers and extraneous conductive lines placed in the conductive layers. The extraneous conductive lines are made of a material which is the same as the material in the conductive layers and have dimensions which are the same as the dimension of the material in the conductive layers. The extraneous conductive lines perform functions which are unnecessary to the operation of the integrated circuit and are undistinguishable from the functional conductive lines, thus burdening the work of a reverse engineer. The method of designing the multilayered circuit comprises a step of providing a computer generated representation of the extraneous conductive lines.

Multilayered integrated circuit with extraneous conductive traces

Growing community of inventors

Vernon, CA, United States of America

Paul Yang