Cirrus Logic Inc.

Micrel, Incorporated

Paul Wilson

Axel Thomsen

John L Melanson

Ravi Kishore Kummaraguntla

James Thomas Deas

Mucahit Kozak

Karthikeya Kodur

Rudolf Gerardus Van Ettinger

Eric Jerome King

Peter Chambers

Christian Larsen

Graeme G Mackay

Stephen Timothy Hodapp

Yongjie Cheng

Ivan Perry

Arashk Norouzpourshirazi

Roel Van Ettinger

James Wells

Paul Ad Smith

Wei Xu

Sven Soell

John Priestley

Mujo Kozak

Circuitry for processing an analyte signal obtained from an electrochemical cell, the circuitry including: a first signal path between a first electrode of the electrochemical cell and a first input of an analog-to-digital converter (ADC) circuit, the first signal path comprising a first gain stage configured to convert the analyte signal to a first analog signal; a second signal path between the first electrode and a second input of the ADC circuit, the second signal path comprising a second gain stage configured to convert the analyte signal to a second analog signal; and switching circuitry configured to selectively couple the first electrode to the first input of the ADC circuit.

Circuitry for measurement of electrochemical cells

A circuit may include a two-stage feedforward compensated operational transconductance integrated amplifier, and the two-stage feedforward compensated operational transconductance integrated amplifier may include an input terminal, an output terminal, a signal path between the input terminal and the output terminal, the signal path comprising a first signal path gain stage and a second signal path gain stage, and ripple rejection circuitry coupled between the input terminal and an intermediate node of the signal path located between the first signal path gain stage and the second signal path gain stage. The ripple rejection circuitry may include a first ripple rejection circuitry gain stage coupled at its input to the input terminal and coupled at its output to an input terminal of a chopper circuit, a notch filter coupled at its input to an output terminal of the chopper circuit, and a second ripple rejection circuitry gain stage coupled at its input to an output terminal of the notch filter and coupled at its output to the intermediate node.

Operational amplifier for use in coulomb counter circuit

Coulomb counter circuitry operable in a first mode of operation and a second mode of operation, the coulomb counter circuitry comprising: first analog to digital converter (ADC) circuitry configured to generate a first ADC output signal indicative of a current through a load coupled to the coulomb counter circuitry; second analog to digital converter (ADC) circuitry; offset correction circuitry; and accumulator circuitry configured to generate a signal indicative of a cumulative amount of charge transferred to the load, wherein in the second mode of operation, the coulomb counter circuitry is operable to enable the second ADC circuitry and to generate an offset correction factor based at least in part on a second ADC output signal output by the second ADC circuitry, and wherein in subsequent operation of the coulomb counter circuitry in the first mode of operation, the offset correction circuitry applies the offset correction factor to the first ADC output signal.

Coulomb counter circuitry

A system may include a switched-capacitor analog front end comprising a plurality of switches for sampling an analog physical quantity and a bootstrap generation network electrically coupled to the plurality of switches and configured to generate a bootstrap sampling clock for controlling the plurality of switches and generate a floating supply voltage for the bootstrap sampling clock based on the analog physical quantity.

Beyond-the-rails switched-capacitor floating front end with over-voltage protection

A signal processing system may include a sensor readout channel configured to convert an electronic signal into a digital quantity. The sensor readout channel may include a first-order sigma-delta modulator having a modulator input and a modulator output, first outside chopping switches located at the modulator input, second outside chopping switches located at the modulator output, an auxiliary path having an analog-to-digital converter (ADC) having an auxiliary path input and an auxiliary path output, the auxiliary path input configured to receive as its input signal a signal output by a memory element of the first-order sigma-delta modulator, and a signal combiner configured to combine a modulator output signal generated by the first-order sigma-delta modulator with an auxiliary path output signal generated by the auxiliary path to generate a combined output signal.

Sigma-delta modulator with residue converter for low-offset measurement system

A system may include a front end differential amplifier having two input terminals, two input resistors, each of the two input resistors coupled to a respective one of the two input terminals, and an input common mode biasing circuit for an output stage of the front end differential amplifier, the input common mode biasing circuit comprising two current sources configured to generate currents for biasing the output stage of the front end differential amplifier.

Current sensing circuitry

This application relates to amplifier circuitry for amplifying an input signal from a MEMS capacitive sensor. The amplifier circuitry includes a first amplifier for receiving the input signal (V) and outputting a first output signal (V) based on the input signal. A second amplifier is configured to output a second output signal (V) which varies inversely with the first output signal. The first and second amplifier outputs are connected via first and second impedances so that a voltage at a common-mode node is equal to a common-mode voltage of the first and second output signals. The second amplifier has an input stage having an input terminal connected to a first reference voltage (V) and a feedback terminal connected to the common-mode node. The second amplifier also has an output stage connected between an output terminal of the input stage and the second amplifier output.

Amplifier circuitry

This application relates to methods and apparatus for operating MEMS sensors, in particular MEMS capacitive sensors (C) such as a microphones. An amplifier apparatus is arranged to amplify an input signal (V) received at a sense node from the MEMS capacitive sensor. An antiphase signal generator generates a second signal (V) which is in antiphase with the input signal (V) and an amplifier arrangement is configured to receive the input signal (V) at a first input and the second signal (V) at a second input and to output corresponding amplified first and second output signals. This converts a single ended input signal effectively into a differential input signal.

MEMS sensors

The present disclosure relates to a system comprising: a MEMS capacitive transducer comprising a first electrode and a second electrode; integrator circuitry; and test circuitry. The MEMS capacitive transducer forms part of a negative feedback path of the integrator circuitry, and the test circuitry is operable to selectively apply one or more current sources to an input of the integrator circuitry based on a signal at an output of the integrator so as to generate a periodic signal at the output of the integrator circuitry. A frequency of the periodic signal is at least partially dependent upon a capacitance of the MEMS capacitive transducer. The system is further operative to determine a parameter indicative of the frequency of the periodic signal and to estimate the capacitance of the MEMS capacitive transducer based on the parameter indicative of the frequency of the periodic signal.

MEMS transducer system

This application relates to methods and apparatus for operating MEMS sensors, in particular MEMS capacitive sensors (C) such as a microphones. An amplifier apparatus () is arranged to amplify an input signal (V) received at a sense node () from the MEMS capacitive sensor. An antiphase signal generator () generates a second signal (V) which is in antiphase with the input signal (V) and an amplifier arrangement () is configured to receive the input signal (V) at a first input and the second signal (V) at a second input and to output corresponding amplified first and second output signals. This converts a single ended input signal effectively into a differential input signal.

MEMS sensor

A voltage regulator includes a power device formed by an NMOS transistor having a drain terminal coupled to an input voltage, a source terminal providing an output voltage and a gate terminal receiving a gate drive signal; and an integrated AC/DC control loop configured to access the output voltage and to generate the gate drive signal based on a value of the output voltage in relation to a first reference voltage and a second reference voltage. The AC control portion generates a gate drive control signal which is AC coupled to the gate terminal of the power device as an AC component of the gate drive signal. The DC control portion controls a DC voltage level of the gate drive signal. The AC control portion is powered by the input voltage while the DC control portion is powered by a high supply voltage greater than the input voltage.

High bandwidth PSRR power supply regulator

A thermal sensor for an integrated circuit including a bandgap reference circuit. The thermal sensor includes a comparator that compares a temperature dependent voltage generated by the bandgap reference circuit to a temperature independent voltage, where both temperatures are referenced to the bandgap reference voltage generated by the bandgap reference circuit. The thermal sensor generates a digital output control signal based on a predetermined relationship between the temperature dependent voltage and the temperature independent reference voltage. When used as a thermal shutdown circuit, the comparator generates a thermal shut-down signal when the dependent temperature voltage decreases (or increases) with rising system temperature to equal to the temperature independent reference voltage. The comparator is implemented using an operational amplifier that is connected to existing circuitry associated with the bandgap reference circuit.

Bandgap-referenced thermal sensor

Evaluating an embedded EPROM in a host IC device involves using program circuitry to program/unprogram all of the floating-gate cells of the embedded EPROM, then simultaneously transmitting a predetermined test bias voltage to all of the programmed/unprogrammed floating-gate cells, and then evaluating the output terminals of all of the floating-gate cells using a logic (e.g., wired NOR or NAND) circuit, whereby successful operation of all of the embedded EPROM cells causes the wired logic circuit to generate a single positive test result signal, and the failure of one or more of the embedded EPROM cells causes the wired logic circuit to generate a single negative test signal. A reference cell is also evaluated using a bias testing circuit to determine that the reference voltage supplied during normal operation is at an acceptable voltage level.

Threshold evaluation of EPROM cells

A circuit in an integrated circuit having input terminals coupled to a resistor network for selecting one of multiple digital states includes a tri-state circuit, a multiplexer, a comparator and a control circuit. A DAC can be used to generate a set of comparison voltage levels. The circuit detects the power connection and the resistance values of at least two resistors in the resistor network having a third resistor of fixed resistance. The resistance values for the two resistors are selected from a set of resistance values corresponding to the number of digital stages which can be programmed on each terminal. The power connection option doubles the number of digital stages to be programmed on each terminal. Thus, multiple programming states can be assigned to each control pin of an integrated circuit and a large number of programming states can be programmed using a small number of control pins.

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Linlithgow, United Kingdom

Paul Wilson