Sarnoff Corporation

Thomson Multimedia S.a.

Other

Rca Thomson Licensing Corp.

Leitch Incorporated

Thomson Licensing S.a.

Rca Licensing Corporation

David Sarnoff Research Center, Inc.

Harris Corporation

Paul Wallace Lyons

Alfonse Anthony Acampora

John Prickett Beltz

Victor Vincent D'Alessandro

Nicola J Fedele

Charles M Wine

Richard Michael Bunting

Steven T Jaffe

Christopher H Strolle

Christopher Ward

Robert Norman Hurst

Stuart S Perlman

Chris Ward

Edward Coley Fox

Clifford Arthur Pecota

Sanford Eisenhandler

Michael J Shumila

Steven Kennedy Evans

Marla Brashear

Alphonse A Acampora

Alfonse A Acampora

Victor Vincent D'alessandro

A desktop shield system having a panel with a top surface and a bottom surface, the panel is clear or transparent, wherein a user can write on the top surface of the panel with a non-permanent marker, and a plurality of magnets on the bottom surface of the panel, wherein a template can be placed in between the bottom surface of the panel and a desktop.

Desktop shield system

A method for seamlessly splicing a local commercial segment into an existing network time slot, without decoder buffer overflow or underflow. The vbv_delay of the commercial segment is manipulated (e.g., for a minimum delay or a maximum delay). The pictures from the commercial segment are output for at least a portion of the associated network time slot duration. A determination is made regarding the number of pictures remaining in a stored portion of the incoming network feed or the commercial segment and the output rate is adjusted as required. The vbv_delay of the stored network feed or the vbv_delay of the local commercial segment is adjusted to match the vbv_delay of the incoming network feed.

Splicing compressed, local video segments into fixed time slots in a network feed

A system and method for generating a transport packet stream having an output formatted as an ASI group having a plurality of short and long ASI packets in a fixed sequence. The short and long ASI packet each have an associated transport packet and a fixed number of special idle characters and the transport packets are dispersed among the special idle characters.

Single clock reference for compressed domain processing systems with interspersed transport packets

A device and method for utilizing a single clock signal to generate a digital data stream signal for transmission in a compressed domain transmission system. The device includes a plurality of packetized elementary stream encoders electronically coupled to a transport stream encoder electronically coupled to an output interface adapted to generate the digital data stream signal. The method includes: operating each of the packetized elementary stream encoders responsively to the single clock sequence to generate a plurality of packetized elementary stream signals; operating the transport stream encoder responsively to the single clock signal to form a transport stream signal from the plurality of packetized elementary stream signals, wherein the transport stream signal includes a plurality of data packets each formed using the transport stream encoder and select ones of the plurality of data packets formed by the transport stream encoder include synchronization data; and, operating the output interface responsively to the single clock reference to output the digital data stream signal in compliance with an predefined manner.

Single clock reference for compressed domain processing systems

In a compressed domain digital communications system, a method for reducing a variable latency associated with a buffer and at least partially resulting from at least one splice between a FROM bitstream and a TO bitstream each including data corresponding to a plurality of frames, the method including: selectively deleting data corresponding to a select at least one of the frames from the buffer based upon the variable latency so as to reduce the variable latency when an amount of data corresponding to a number of frames present in the buffer is greater than a given number of frames; and, regulating a flow of data in the system to prevent an underflow condition in the system by effecting a repeat last frame command and prevent an overflow condition in the system by slowing a rate of transmission for the data associated with at least one of the frames in the TO bitstream.

Flow control, latency control, and bitrate conversions in a timing correction and frame synchronization apparatus

A method and apparatus for preserving audio and video presentation synchronization during the splicing operation by selectively deleting, if necessary, an audio/video access unit to avoid overlapping of audio/video frames in the spliced output stream.

Method and apparatus for preserving synchronization of audio and video presentation when splicing transport streams

A method and apparatus for splicing a first compressed digital information stream into a second compressed digital information stream. The first information stream includes at least one entrance indicium identifying an appropriate stream entrance point, the second information stream includes at least one exit indicium identifying an appropriate stream exit point. A controller monitors the two streams until the appropriate points are found and, in response to a control signal, splices the first stream into the second stream.

Method and apparatus for splicing compressed information streams

An apparatus and method for receiving an information stream comprising a plurality of timing portions and associated payload portions, decoding each timing portion, determining a duration parameter of a payload portion associated with the decoded timing portion, and recoding the timing portion using the duration parameter and a local reference time parameter.

Timing correction method and apparatus

Transport processor interface and video recorder/playback apparatus in a

A system and method for distribution of a clock signal of a new timing reference which may employ an existing NTSC distribution network present in a conventional NTSC studio. NTSC-compliant horizontal, vertical, or other composite synchronization signals are generated from an HDTV primary reference clock, and are synchronized and locked to the HDTV primary reference, for distribution over the existing NTSC distribution network. HDTV studio components receive the horizontal, vertical, or other composite synchronization signals and generate a local HDTV clock signal using a phase-locked loop frequency synthesizer. The signal generated by the phase-locked loop frequency synthesizer is synchronized and locked to the HDTV primary reference.

Broadcast studio synchronization distribution system and method

A timing synchronization method and apparatus for processing a compressed information stream comprising a plurality of information segments representative of a sequence of information frames. Information segments representative of information frames are deleted in response to an indicium of buffer overutilization.

Method and apparatus for information stream frame synchronization

A method and apparatus for splicing transport streams from multiple sources without violating the clock slew rates specified for a receiver. The method employs a digital phase lock loop (PLL) to lock both the transport output clock of the digital studio and the transmission symbol clock to a stable reference clock of 27 MHz.

Method and apparatus for multiplexing complete MPEG transport streams

A studio to transmitter link (STL) that comprises a relatively low error rate communication channel implements error correction techniques at the studio side which are designed to reduce errors in the combined low error rate STL channel and a relatively high error rate communication channel used by the transmitter.

Studio transmitter link method and apparatus

Transport processor interface for a digital television system

A transport stream encoder comprises a plurality of component signal sources. One of the component signals sources is a source of an opportunistic data component signal carrying a block of data having a predetermined size to be transferred within a predetermined period of time. A packet generator is coupled to the plurality of component signal sources, and produces a composite packet stream, partitioned into successive groups containing a plurality of packet slots. A memory stores a plurality of priority lists respectively associated with the plurality of packet slots. Each priority list contains a plurality of entries, and each entry contains data representing a respective one of the plurality of component signal sources. A scheduler is responsive to the entries in the plurality of priority lists and conditions the packet generator to generate a packet for each one of the packet slots. The generated packet contains data from a component signal source selected from among the component signal sources having representative data in the entries in the priority list associated with that packet slot. A processor modifies the entries in the plurality of priority lists in such a manner as to ensure that a packet containing data from the opportunistic data component signal source is generated with sufficient time regularity to guarantee that the block of data is transferred within the predetermined time period.

Growing community of inventors

New Egypt, NJ, United States of America

Paul Wallace Lyons