Dell Products Inc.

Advanced Micro Devices Corporation

At+t Corp.

Paul W Vancil

John R Stuewe

Edmond Ira Bailey

Kunrong Wang

Timothy Michael Lambert

Elie Antoun Jreij

Austin Michael Shelnutt

Marshal F Savage

Balaji Bapu Gururaja Rao

German Florez-Larrahondo

Wei G Liu

Akkiah Choudary Maddukuri

Eugene David Cho

Sanjeev Singh

Mario Alberto Sanchez

Mukund Purshottam Khatri

Shekar Babu Suryanarayana

Jimmy Doyle Pike

Michael A Brundridge

Terry Lynn Cole

Joseph Andrew Vivio

Thomas Wayne Anderson

Prashanth Giri

Stephen Cochran

Roger M Blood

Truc M Nguyen

Herbert A Hollinger

Richard Owen Waldorf

Stephen P Rousset

Ramkrishna V Prakash

Stephen Rousset

Charles Edward Smith

Norman R Tiedemann

Methods and systems for managing the operation of data processing systems are disclosed. A data processing system may include a computing device that may enter various operating states by performing various types of startups. The startups may include use of code bases for which the computing device may not inherently be able to validate. To reduce risk of using the code bases, the computing device may perform processes to validate the code bases prior to using the code bases. Additionally, the computing devices may limit the types of interfaces that may be established during the startups while allowing other types of interfaces to be established to provide startup flexibility.

System and method for flexible startup of data processing systems

Methods and systems for managing the operation of data processing systems are disclosed. A data processing system may include a computing device that may enter various operating states by performing various types of startups. The startups may include use of code bases for which the computing device may not inherently be able to validate. To reduce risk of using the code bases, the computing device may perform processes to validate the code bases prior to using the code bases. The processes may include obtaining security information for a portion of the code base from a trusted source, and using the security information to validate portions of the code base ahead of use of the portions to complete startups.

System and method for efficient secured startup of data processing systems

An Information Handling System (IHS) includes multiple hardware devices, and a baseboard Management Controller (BMC) in communication with the plurality of hardware devices. The BMC includes instructions for executing a bootloader to verify an integrity of a first firmware stack, and boot the first firmware stack on a first processor. Once booted, the first firmware stack verifies the integrity of a first code segment on a second processor that is also used to execute a custom BMC firmware stack. The first code segment is executed to verify the integrity of one or more vendor supplied code segments executed on the second processor.

Trust verification system and method for a baseboard management controller (BMC)

An Information Handling System (IHS) includes multiple hardware devices, and a baseboard Management Controller (BMC) in communication with the plurality of hardware devices. The BMC includes instructions for executing an assistance application (APP) in an untrusted domain of the BMC. The assistance APP configured to monitor a custom BMC firmware stack executed in the untrusted domain. The instructions are further executed to verify an integrity of the assistance APP from a trusted domain of the BMC by encrypting communications between the trusted and untrusted domains using an encryption key that comprises a function of a time counter value.

System and method for maintaining trusted execution in an untrusted computing environment using a secure communication channel

An information handling system may include a circuit board; a processor disposed on the circuit board, wherein the processor includes a media access control (MAC) address and a hidden root key (HRK) encoded therein; and a memory not disposed on the circuit board. The information handling system may be configured to: determine a customer public key (CPK); create a data structure comprising the CPK and the MAC address; encrypt the data structure using the HRK to generate an encrypted structure; and store the encrypted structure in the memory.

Binding customer-signed image to a specific platform

A computer-implemented method enables rack-level predictive power capping and power budget allocation to processing nodes in a rack-based IHS. A rack-level management controller receives node-level power-usage data and settings from several block controllers, including current power consumption and an initial power budget for each node. A power consumption profile is generated based on the power-usage data for each node. A total available system power of the IHS is identified. A system power cap is determined based on the power consumption profiles and the total available system power. A current power budget is determined for each node based on an analysis of at least one of the power consumption profile, the initial power budget, the current power consumption, the system power cap, and the total available system power. A power subsystem regulates power budgeted and supplied to each node based on the power consumption profiles and the system power cap.

Predictive power capping and power allocation to computing nodes in a rack-based information handling system

A computer-implemented method enables global throttling of processing nodes in a rack-configured information handling system (RIHS). A rack-level management controller receives power-usage data and operating parameters associated with processing nodes within separately-controlled blocks of the RIHS. A power subsystem of the RIHS regulates an amount of power supplied to the processing nodes of the RIHS based on the power-usage data and operating parameters for the processing nodes and a total amount of available power for distribution within the RIHS. In response to detecting a condition that reduces the total amount of available power for distribution within the IHS, the management controller autonomously initiates global throttling of the processing nodes within the IHS to reduce power consumption by at least one of the processing nodes. The global throttling is completed via a signal transfer over a select Ethernet cable wire to connected block controllers that control the processing nodes.

Global throttling of computing nodes in a modular, rack-configured information handling system

A rack-based information handling system (IHS) includes a rack having a modular structure that supports insertion from a front of the rack of different numbers and sizes of information technology (IT) gear to create one or more IT nodes. Power bay chassis is received in the rack with a power distribution unit directed towards a rear of the rack. A modular busbar assembly is attached to the rear of the rack. A first vertical busbar segment is in direct electrical connection with the power distribution unit and spans one or more nodes to provide hot pluggable electrical power to an aft-directed connection of an IT node inserted into the rack. A second busbar segment can be attached to the first vertical busbar to electrically communicate with the power distribution unit and span an additional node adjacent to the one or more nodes to provide electrical power to the adjacent node.

Rack power distribution via modular, expandable bus bar for modular and scalable/expandable information handling system

A computer-implemented method controls liquid cooling of a direct injection liquid-cooled (DL) rack information handling system (RIHS). The method includes receiving, at a liquid cooling control subsystem, an incoming cooling liquid supply flow rate corresponding to an incoming cooling liquid supply being supplied to the DL RIHS. A maximum flow rate cap is calculated for each of the LC nodes. The maximum flow rate cap is transmitted to a controller for each of the LC nodes. The controller triggers each of the LC nodes to adjust the associated flow rate for that LC node to correspond to the received maximum flow rate cap for that node.

Liquid flow control management for shared infrastructure servers

A method provides a service mode within a direct-injection liquid-cooled (DL) Rack Information Handling System (RIHS) having at least one liquid-cooled (LC) node. The method includes: in response to detecting selection of the service mode trigger, transmitting a first control signal to cause a proportional valve to move to an open position for enhanced cooling of the node; monitoring a temperature being sensed in the node; and in response to the temperature reaching a pre-established service mode temperature: forwarding a second control signal, to cause the proportional valve to move to a fully closed position; and generating a notification of an entry of the RIHS into a service mode during which an LC node can be re-engaged with the supply and return port, without affecting an operational on-state of the RIHS and without incurring significant hydraulic pressure when re-engaging the LC node with the liquid cooling system.

Runtime service of liquid cooled servers operating under positive hydraulic pressure without impacting component performance

A rack-based information handling system (IHS) includes a rack having a modular structure that supports insertion of different numbers and sizes of information technology (IT) gear to create one or more IT nodes. A fan bay module is attached to the rack and supports insertion of multiple different fan configurations in more than one fan receptacle. At least one fan is inserted within corresponding at least one fan receptacle of the fan bay module to conform to at least a first fan configuration. A block controller is configurable to control each of the different fan configurations and which, in response to detecting the first fan configuration of the at least one fan inserted within the fan bay module, activates a corresponding first control algorithm that enables the detected first fan configuration to be utilized to provide rack-level cooling for one or more of the IT nodes inserted within the rack.

Enhanced fan design, configuration, and control for modular, scalable and expandable, rack-based information handling system

An information handling system and method of a master baseboard management controller election and replacement sub-system (MBMCERS) enables decentralized resource management control via the elected master baseboard management controller (BMC). The information handling system includes a plurality of server nodes, each having a BMC capable of controlling a plurality of shared common resources among the plurality of server nodes. Each BMC has a unique BMC identification. A master register stores BMC identification that has been elected as the master BMC to control the shared common resources. The master BMC relinquishes control of the shared common resources when the master register is placed in the reset state. When the master register is in the reset state, any one of the BMCs can elect to become a replacement master BMC.

Master baseboard management controller election and replacement sub-system enabling decentralized resource management control

Baseboard management systems and methods with distributed intelligence for multi-node platforms. In an illustrative, non-limiting embodiment, an Information Handling System (IHS) may include a plurality of modules, each of the plurality of modules including a plurality of nodes, each of the plurality of nodes including a system-on-chip (SoC), each of the plurality of SoCs including an integrated management controller (iMC), each of the plurality of iMCs configured to implement a first intelligent platform management interface (IPMI) stack having a first architecture; and a plurality of baseboard management controllers (BMCs), each of the BMCs disposed on a corresponding one of the plurality of modules, each of the BMCs coupled to the plurality of iMCs on the corresponding one of the plurality of modules, each of the plurality of iMCs configured to implement a second IPMI stack having a second architecture different from the first architecture.

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Austin, TX, United States of America

Paul W Vancil