Ics Technologies, Inc.

Avasem Corporation

Paul W Self

Dinh Bui

Pedro W Lo

Satoshi Mukaida

A semiconductor integrated circuit includes a first clock input and a second clock input to receive elements of a differential clock signal. Each clock signal element has a logic state. The circuit generates an output activation signal that depends on the states of the differential clock input signals. Operation of the circuit does not require detection of a frequency of the differential clock signal.

Differential clock signal detection circuit

A semiconductor device includes an external resistor for establishing a delay of a signal relative to another signal in the device. The resistor may be external to a buffer, such as a zero-delay buffer, that receives an input signal generates one or more output signals that relate to the input signal. The delay may be introduced either before or after the buffer.

Signal timing adjustment circuit with external resistor

A high speed voltage controlled oscillator (VCO) providing for low sensitivity to the noise on the integrated circuit's (IC) power supply. The VCO circuit creates a supply voltage for a ring oscillator independent of the IC's power supply thereby controlling the frequency of operation independent of variations on the IC's power supply. A high speed CMOS level shifting circuit provides for converting outputs of the VCO with low logic level and varying frequencies to a signal with a full CMOS logic level and low duty cycle distortion.

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Santa Clara, CA, United States of America

Paul W Self