Harris Corporation

Broadband Communications Products, Inc.

Broadband Technologies, Inc.

Atlantic Scientific Corp.

Scientific Development Inc.

Jds Uniphase Corporation, Ubp

Paul W Casper

James W Toy

Rodney B Bent

J Richard Jones

Randall Sharpe

Fred J Orlando

Thomas E O'Shea

William B Ashley

Ronald R Giri

Gregory M Evans

Richard N Sears

Marc E Sawyer

Peter H Halpern

Norman C Seiler

George A Waschka, Jr

Charles R Patisaul

Willie T Burton, Jr

Thomas J Nixon

Harold Iley

Jeffrey S Grant

Arthur Gerard Wilson

W B Ashley

Marc Sawyer

Randall B Sharpe

Thomas E O'shea

A fiber optic digital communication system and associated transponder architecture interfaces Gigabit Ethernet digital data over an extended range fiber optic link (e.g. upwards of 30 to 100 km), using digital data signal regeneration and optical signal processing components, that pre- and post-compensate for distortion and timing jitter, and thereby ensure accurate regeneration of the data at the far end of the extended distance fiber optic link. Regeneration in both the transmit and receive paths compensates for signal degradation resulting from the very substantial `long haul` fiber distance between transponder sites, and timing jitter customarily present in low cost short haul fiber optic transceiver components. A high speed, low jitter, limiting current driver drives a distributed feedback laser, minimizing jitter generation, and optimizing range extension margin.

Gigabit data rate extended range fiber optic communication system and

To derive a clock embedded in a digital data stream, a variable data rate synchronizer includes a data rate estimator that derives an estimate of the data rate of data contained in the digital data signal, and a frequency estimator that derives an estimate of the frequency of the output of a voltage controlled oscillator. A phase lock loop includes a phase detector to which the digital data signal and the output of the voltage controlled oscillator are coupled and has an output coupled to a sweepable loop filter. The output of the loop filter is coupled to the voltage controlled oscillator. During an initital frequency acquisition mode, the sweep controller sequentially varies an analog voltage applied to the voltage controlled oscillator, until the estimate of the data rate effectively corresponds to the estimate of the frequency of the output of the voltage controlled oscillator. This terminates the frequency acquisition mode and initiates a phase acquisition mode, during which the sweep controller causes a sawtooth sweep of the loop filter, until the output of the loop filter corresponds to the actual frequency of said embedded clock signal, thereby locking the loop to the embedded clock.

Clock extractor for high speed, variable data rate communication system

A data and clock recovery arrangement, for a high speed fiber optic digital communication system in which a serial digital bit stream is pre-scramble encoded by interleaving complementary pairs of overhead bits between successive groups of data bits, and then scrambled and transmitted to a receive site, comprises a data rate independent variable bit rate synchronizer, a descrambler and a decoder. The data rate independent variable bit synchronizer processes the received scrambled and encoded digital bit stream to derive a variable data rate synchronization clock signal. The synchronizer is capable of accepting any data rate within the operational data clock signal range of the system, and automatically tunes itself to the data clock signal embedded in the received scrambled and encoded serial data stream, so as to output respective scrambled and encoded serial data and clock signals. The descrambler descrambles the scrambled and encoded serial digital bit stream using the variable data rate synchronization clock signal, and the decoder decodes the descrambled serial digital bit stream to extract groups of data bits exclusive of the complementary pairs of overhead bits and to derive an output clock signal having a frequency coincident with the data rate of the data bits.

Method and apparatus for extracting an embedded clock from a digital

A modulation drive current control loop for a digitally modulated laser diode uses the small signal, square-law portion of an RF signal diode detection circuit to adjust the magnitude of laser modulation drive current, and compensate for variations in temperature and aging of the laser diode. Operating the RF signal detector diode as a non-switched device, in its square-law region, provides several advantages over large signal, switched, linear region devices. When a detector diode is operated in the large signal, switched, linear region, its output depends upon the reduced slope beyond the `knee` region of the curve, so that the diode functions essentially as a switch. In such a large signal detection mode, the diode conducts during only a portion of the input cycle, with its output voltage following peaks of the input signal waveform in accordance with a linear relationship between input voltage and output voltage. This requirement for both a large valued input signal (to overcome the bandgap voltage of the diode) and the need to switch the detector diode on and off necessarily prevents its use with precision at very high (e.g., gigabit) data rates. In contrast therewith, the small signal, square-low detector diode of the present invention can easily produce a proportional output voltage at gigabit speeds using a very small amplitude input signal.

Compensation for variations in temperature and aging of laser diode by

A totally D.C. balanced and bit-rate independent digital clock encoding technique is applicable to a variety of digital signalling systems, including fiber optic digital signalling. Each of successive event cells of the clock signal is demarcated by clock transitions of opposite polarity, so that each clock cycle contains two event cells, one of which is redundant. For a first binary data value, such as a `0`, a pair of unmodified successive event cells of the clock signal are provided as an output. Namely, the clock signal is unaffected, so that both halves of a complete, unmodified clock cycle are reproduced `as is` as the encoded clock output. For a second binary data value, such as a `1`, an event cell is modified by inserting a pulse, of finite duration, less than the duration of the event cell, the pulse being delayed with respect to a leading clock transition of the pair of alternating, opposite clock transitions of the event cell. Since event cells are encoded in pairs, in order to provide redundancy and achieve total D.C. balance, the first pulse has a first polarity, while the second pulse has a second, complementary polarity. Because the encoding mechanism of the present invention has built-in redundancy, it readily accommodates both quality monitoring at the receiver, as well as sub-rate channel signalling.

Bit rate-insensitive mechanism for transmitting integrated clock and

A fiber optic telecommunication system has master site linked to a plurality of subscriber interface sites by a single pair of optical fibers. Downlink messages are transmitted in a continuous TDM format over a first optical fiber from the master site to subscriber interface sites, and in a burst mode TDMA format over a second optical fiber from the subscriber interface sites to the master site. Each subscriber interface site is coupled to the optical fiber link by way of a multiple fan-out fiber coupling pedestal at a common location on the fiber pair. To prevent collisions between successive uplink bursts from the subscriber interface sites, a guard band separates successive uplink messages from one another. The guard band duration accommodates optical fiber transmission distance between the common location on the uplink optical fiber and the subscriber interface site whose differential optical fiber transmission distance from the common location is greatest. A subscriber location has a television decoder associated with the subscriber's television set, through which television channel selection signals are input by the subscriber for transmission from the subscriber interface site to the master site. Power is provided by way of a replaceable battery pack, housed in a subterrestrial bell jar configuration, effectively insulating the battery pack from extreme temperature changes and the intrusion of moisture.

Fiber optic telecommunication system employing continuous downlink,

The present invention includes both a system and a method for locating a source of a randomly modulated signals. In one form of the invention at least three receiving stations receive and process the randomly modulated signal. A common reference level is selected at each of the receiving stations. The times of arrival at each receiving station of the selected transitions of the signal with reference to the common reference level are determined. Each of the receiving stations provides an indication of the selected transitions to a center facility for processing to provide an indication of the location of the signal.

Locating system and method

The present invention includes both a system and a method for locating a source of a randomly modulated radio signal. In one form of the invention, at least three receiving stations at known locations receive and process the randomly modulated radio signal. A common reference level is selected for the radio signal at each of the receiving stations. The times of arrival at each receiving station of selected transitions of the radio signal with reference to the common reference level are determined. Each receiving station provides an indication of the times of arrival of the selected transitions to a central facility for processing to provide an indication of the location of the signal source.

A method for detecting lightning as an electrical atmospheric disturbance and for providing an indication of the geographic position of that disturbance includes the stationing of at least three receivers at known geographic locations in spaced relationship to each other. Signals are encoded at each of the receivers representative of the time of arrival of an electrical indication of an emission from the lightning strike, in relation to a common timing source. All of the encoded signals are transmitted to a central facility and thereafter processed for deriving the position of the lightning strike irrespective of whether the position of the lightning occurred within or outside the perimeter bounded by the three receivers. The system is synchronized with the U.S. Coast Guard LORAN navigation network, and includes various features which permit a more accurate analysis of lightning position.

Lightning position and tracking method

A lightning ground stroke location system employs a time-of-arrival discrimination scheme which uses, as its time synchronization base, the U.S. Coast Guard LORAN-C navigation network. The system comprises a plurality (at least three and preferably four) of geographically separated lightning stroke monitoring stations. Each station contains a lightning stroke detector and a timing signal generator that is synchronized with the timing signal generator at each other respective detection location. The timing signal generation equipment at each receiver is comprised of a LORAN-C signalling responsive receiver which monitors the same encoded signal group emitted from a common LORAN-C reverence source. Each of the ground stroke detection stations is further connected via a respective communication link to a central processing facility. When a ground stroke occurs, the electromagnetic pulse emitted is detected by each listening station, which records the time of detection of the ground stroke by sampling an internal synchronized clock at that particular station so as to record the time that the stroke was detected relative to the standard timing cycle is emitted by the reference Coast Guard station source. This time data is then transmitted to the central processing station, which after compensating for relative LORAN time signal propagation delay calculates the stroke location.

System for lightning ground stroke position by time of arrival

A multichannel data link switching control arrangement for synchronizing the substitution of one data channel for another without causing the insertion or deletion of data bits from the data transmitted over the communication path that is coupled to the channels. The switching control arrangement monitors the relative timing between the data on a channel to be replaced and the data on the replacement channel. Precisely controlled delay circuitry delays the data on one channel relative to the other until the data signals on the two channels are within .+-. a quarter bit of each other, at which time the channel substitution is effected. The arrangement includes a pair of control switch units each of which may be selectively controlled to couple either the active channel or the replacement channel to an output communication link. Each switch control unit contains an input multiplexer and an output switch, the operations of which are controlled by a data timing monitoring apparatus or control unit. The outputs of the two switch control units are coupled to signal combining and splitting circuitry the output of which may be phase compared with the data being coupled through either switch unit. A controllable data delay unit is coupled to one channel at the input to the dual switch control unit configuration and serves to selectively delay one channel with respect to the other as the data signals on both are applied to respective switch control units until the data streams on the two channels are synchronized. At that time, a control signal is applied to the two switch control units to effect a simultaneous switching of the output switches in each unit, whereby channel substitution is effected. The delay action of the delay unit remains in the replacement channel, except that no further incrementing of the delay is carried out.

Synchronized protection switching arrangement

A repeatered, multichannel fiber optic communication network includes a plurality of full duplex fiber optic channels and one or more auxiliary channels. In order to supervise and control the operation of the network, for both data transmission and fault/maintenance actions, each terminal station contains a processor-based subsystem capable of network monitoring, first level maintenance action, fault isolation, and remote network control and status reporting. This processor-based subsystem interfaces with each fiber optic channel, with an orderwire communication link, and with external input/output devices and surveillance equipment. Three substantially autonomous processor-based sections which are dedicated to performing specific functions within the overall network operation are employed for carrying out these separate interfacing tasks. Each section of the processor-based subsystem in a terminal station contains its own CPU and associated memory and is programmed to carry out specific functions identified with that section. Each section is interconnected with the other two so that, internally, the subsystem is fully integrated.

Repeatered, multi-channel fiber optic communication network having fault

A photodiode receiver circuit having self-contained automatic gain control and which is temperature compensated over a wide operating range contains a resistor coupled in series between a bias power supply and one end of an avalanche photodiode. Self-generated AGC action results from the fact that the gain of an avalanche photodiode increases as the bias voltage applied across the diode increases. As the light intensity received by the diode increases, there is a corresponding increase in the current flow through the diode and the series-connected resistor. The consequential increase in IR drop across the resistor decreases the bias voltage across the diode, so that the gain of the diode is reduced. Through this action, the dynamic range of optical input of the photodiode will be increased for a fixed dynamic range of electrical output. Temperature compensation is achieved by coupling a temperature-sensitive voltage divider circuit between the bias voltage supply and the gain-controlling resistor. This voltage divider network may include a thermistor coupled in parallel with one resistor component of a resistor divider that is connected to a bias voltage source. The value of the parallel resistor is chosen to match the thermistor's characteristic to the voltage versus temperature characteristic of the APD so that a temperature-compensated bias voltage reference, to which the gain-controlling resistor is connected, is available over a wide temperature range (e.g. -40.degree. C. to +60.degree. C.). This temperature compensation allows the avalanche photodiode to be operated at a nearly constant available gain across this range and prevents the diode from being damaged by too high a bias voltage.

Temperature compensated avalanche photodiode optical receiver circuit

An injection laser diode transmitter for a fiber optic link contains a detector that monitors transmitted optical pulses for signal quality. The transmitted signal component is extracted from the back facet of the ILD for feedback stability control and is coupled to signal quality measuring circuitry from a wideband current-to-voltage converter that is coupled to the output of a fast photo diode that extracts the optical output signal from the rear facet of the ILD for the purposes of generating a feedback control voltage to be used for ILD bias control. The bias current feeds a reference amplifier, the output of which is coupled to a lowpass filter to remove the pulse signal component. The output of the lowpass filter is a DC voltage level which is proportional to the average optical output of the ILD. The voltage level output of the lowpass filter is applied to a current sink coupled to the ILD. The bias current for the ILD is controlled to drive the differential to zero. Because the bias current control feedback loop is responsive to the optical output of the ILD, the bias current is automatically compensated for changes in temperature. The current-to-voltage converter output is further coupled to a buffer amplifier to supply an output voltage to downlink signal quality monitoring circuitry to facilitate fault isolation.

Growing community of inventors

West Melbourne, FL, United States of America

Paul W Casper