Vlt Corporation

Epic Technologies, Inc.

Paul V Starenas

Patrizio Vinciarelli

Charles I McCauley

Michael B LaFleur

Charles W Eichelberger

Power conversion apparatus can include a circuit board with power conversion circuitry and a package. The package may be formed by encapsulating areas of the circuit board assembly either before or after the interface contacts are attached to the circuit board. A method for encapsulating two sides of a substrate can include providing a mold that fills a larger first cavity to create a sealing force on a smaller second cavity. The encapsulant flows through the first cavity into the second cavity. A thermal extender can include a surface for mounting a heat dissipating power converter and a surface for mating with an external circuit board. Interface conductors may mate with contacts on the heat dissipating power converter and with conductive regions on the external circuit board. A heat sink may be thermally coupled to remove heat generated by the power converter.

Power converter package and thermal management

Power conversion apparatus includes a circuit board with power conversion circuitry and a package having an upper portion and a lower portion that respectively enclose circuitry on a top surface and a bottom surface of the circuit board. The lower portion encloses a smaller region than that enclosed by the upper portion. The regions are arranged to define an overhang region on the bottom surface of the circuit board. Interface contacts are provided on the bottom surface in the overhang region for making electrical connections to the circuit board. A thermal extender includes a surface for mounting a heat dissipating power converter and a surface for mating with an external circuit board. Interface conductors mate with contacts on the power converter and with conductive regions on the external circuit board. A heat sink is thermally coupled to remove heat generated by the power converter.

Structure and method for temporarily holding at least one integrated circuit chip during packaging thereof are presented. A support plate has a release film secured to a main surface thereof. The support plate and release film allow UV light to pass therethrough. A UV curable chip adhesive is disposed over the release film for holding the at least one integrated circuit chip. After placement of the at least one integrated circuit chip in the UV curable chip adhesive, the UV curable chip adhesive is cured by UV light shone through the support plate and release film. As one example, the release film includes a UV release adhesive and the UV curable chip adhesive and UV release adhesive have a differential response to UV light which allows curing of the UV curable chip attach without release of the UV release adhesive.

Structure and method for temporarily holding integrated circuit chips in accurate alignment

An interconnect architecture in which a substrate such as a printed circuit board includes multiple conductive layers separated by one or more interposed insulating layers, the conductive layers being adapted to receive a high density array of interconnect elements such as a ball grid array (BGA). In certain preferred embodiments, a printed circuit board may provide a very low resistance interconnect forming the drain and source terminals of a lateral power MOSFET device incorporating a high density array of alternating source and drain interconnect elements, such as a BGA. In such embodiments, source and drain currents may be routed on different conductive layers separated by one or more interposed insulating layers. The upper conductive layer may include laterally non-conductive regions accommodating conductive columns that are connected to the lower conductive layer.

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Windham, NH, United States of America

Paul V Starenas