Ansys, Inc.

Paul Traynar

Seema Naswa

Praveen Singhal

A power profile for an electronics design is implemented by accessing a unit descriptive of an electronic design comprising a first intellectual property (IP) block expressed in a simulation language and comprising a netlist. A total number (NT) of net weights are identified in the netlist, wherein each respective net weight is proportional to an effective load capacitance of an associated net. A total number (NP) of populated nets having associated toggle simulation data are identified in the netlist. A ratio (KS) equal to a sum of all NT net weights divided by a sum of all NP populated net weights is generated. A sample energy (ES) is generated based on the associated toggle simulation data of and net weights for each of the NP populated nets. And a block power profile is modelled based on an estimated block energy (EN) equal to KS multiplied by ES.

Generating a power profile by node sampling an IP block

Example systems and methods are disclosed for estimating wire capacitance in an RTL circuit design. In an embodiment, a reference post-layout design is received from a non-transitory storage medium, and gate-level nets within the reference post-layout design are classified as either long nets or short nets based, at least in part, on an average fanout length within the gate-level net. A parasitic model may be generated for each of the gate-level nets, and the gate-level nets and associated parasitic models may be stored within either a long net database or a short net database based on the classification of the gate-level net. A net from the RTL circuit design may be classified as either long or short based, at least in part, on a number of modules crossed by one or more fanouts within the net. If the net from the RTL circuit design is classified as long, then capacitance for the net may be estimated using a parasitic model selected from the long net database. If the net from the RTL circuit design is classified as short, then capacitance for the net may be estimated using a parasitic model selected from the short net database.

Growing community of inventors

Banbury, United Kingdom

Paul Traynar